Home
last modified time | relevance | path

Searched refs:RSTCTL1_BASE (Results 1 – 18 of 18) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h27478 #define RSTCTL1_BASE (0x50020000u) macro
27482 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
27486 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
27495 #define RSTCTL1_BASE (0x40020000u) macro
27497 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
27499 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_cm33.h27478 #define RSTCTL1_BASE (0x50020000u) macro
27482 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
27486 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
27495 #define RSTCTL1_BASE (0x40020000u) macro
27497 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
27499 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
DMIMXRT685S_dsp.h19642 #define RSTCTL1_BASE (0x40020000u) macro
19644 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
19646 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h38007 #define RSTCTL1_BASE (0x50020000u) macro
38011 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
38015 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
38024 #define RSTCTL1_BASE (0x40020000u) macro
38026 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
38028 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_cm33.h39634 #define RSTCTL1_BASE (0x50020000u) macro
39638 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
39642 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
39651 #define RSTCTL1_BASE (0x40020000u) macro
39653 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
39655 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
DMIMXRT595S_dsp.h32329 #define RSTCTL1_BASE (0x40020000u) macro
32331 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
32333 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h41217 #define RSTCTL1_BASE (0x50040000u) macro
41221 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
41225 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
41234 #define RSTCTL1_BASE (0x40040000u) macro
41236 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
41238 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
DMIMXRT735S_cm33_core1.h41277 #define RSTCTL1_BASE (0x50040000u) macro
41281 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
41285 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
41294 #define RSTCTL1_BASE (0x40040000u) macro
41296 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
41298 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
DMIMXRT735S_ezhv.h59565 #define RSTCTL1_BASE (0x40040000u) macro
59567 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
59569 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h39633 #define RSTCTL1_BASE (0x50020000u) macro
39637 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
39641 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
39650 #define RSTCTL1_BASE (0x40020000u) macro
39652 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
39654 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h44500 #define RSTCTL1_BASE (0x50040000u) macro
44504 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
44508 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
44517 #define RSTCTL1_BASE (0x40040000u) macro
44519 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
44521 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
DMIMXRT758S_hifi1.h44438 #define RSTCTL1_BASE (0x50040000u) macro
44442 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
44446 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
44455 #define RSTCTL1_BASE (0x40040000u) macro
44457 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
44459 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
DMIMXRT758S_ezhv.h62710 #define RSTCTL1_BASE (0x40040000u) macro
62712 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
62714 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h44438 #define RSTCTL1_BASE (0x50040000u) macro
44442 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
44446 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
44455 #define RSTCTL1_BASE (0x40040000u) macro
44457 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
44459 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
DMIMXRT798S_cm33_core1.h44500 #define RSTCTL1_BASE (0x50040000u) macro
44504 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
44508 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
44517 #define RSTCTL1_BASE (0x40040000u) macro
44519 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
44521 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
DMIMXRT798S_ezhv.h62734 #define RSTCTL1_BASE (0x40040000u) macro
62736 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
62738 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/
DRW610.h55222 #define RSTCTL1_BASE (0x50020000u) macro
55226 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
55230 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
55239 #define RSTCTL1_BASE (0x40020000u) macro
55241 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
55243 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/
DRW612.h55222 #define RSTCTL1_BASE (0x50020000u) macro
55226 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
55230 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }
55239 #define RSTCTL1_BASE (0x40020000u) macro
55241 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE)
55243 #define RSTCTL1_BASE_ADDRS { RSTCTL1_BASE }