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Searched refs:RSTCTL1 (Results 1 – 16 of 16) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_reset.c69 RSTCTL1->PRSTCTL0_SET = bitMask; in RESET_SetPeripheralReset()
70 while (0u == (RSTCTL1->PRSTCTL0 & bitMask)) in RESET_SetPeripheralReset()
75 RSTCTL1->PRSTCTL1_SET = bitMask; in RESET_SetPeripheralReset()
76 while (0u == (RSTCTL1->PRSTCTL1 & bitMask)) in RESET_SetPeripheralReset()
81 RSTCTL1->PRSTCTL2_SET = bitMask; in RESET_SetPeripheralReset()
82 while (0u == (RSTCTL1->PRSTCTL2 & bitMask)) in RESET_SetPeripheralReset()
129 RSTCTL1->PRSTCTL0_CLR = bitMask; in RESET_ClearPeripheralReset()
130 while (bitMask == (RSTCTL1->PRSTCTL0 & bitMask)) in RESET_ClearPeripheralReset()
135 RSTCTL1->PRSTCTL1_CLR = bitMask; in RESET_ClearPeripheralReset()
136 while (bitMask == (RSTCTL1->PRSTCTL1 & bitMask)) in RESET_ClearPeripheralReset()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_reset.c69 RSTCTL1->PRSTCTL0_SET = bitMask; in RESET_SetPeripheralReset()
70 while (0u == (RSTCTL1->PRSTCTL0 & bitMask)) in RESET_SetPeripheralReset()
75 RSTCTL1->PRSTCTL1_SET = bitMask; in RESET_SetPeripheralReset()
76 while (0u == (RSTCTL1->PRSTCTL1 & bitMask)) in RESET_SetPeripheralReset()
81 RSTCTL1->PRSTCTL2_SET = bitMask; in RESET_SetPeripheralReset()
82 while (0u == (RSTCTL1->PRSTCTL2 & bitMask)) in RESET_SetPeripheralReset()
129 RSTCTL1->PRSTCTL0_CLR = bitMask; in RESET_ClearPeripheralReset()
130 while (bitMask == (RSTCTL1->PRSTCTL0 & bitMask)) in RESET_ClearPeripheralReset()
135 RSTCTL1->PRSTCTL1_CLR = bitMask; in RESET_ClearPeripheralReset()
136 while (bitMask == (RSTCTL1->PRSTCTL1 & bitMask)) in RESET_ClearPeripheralReset()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_reset.c69 RSTCTL1->PRSTCTL0_SET = bitMask; in RESET_SetPeripheralReset()
70 while (0u == (RSTCTL1->PRSTCTL0 & bitMask)) in RESET_SetPeripheralReset()
75 RSTCTL1->PRSTCTL1_SET = bitMask; in RESET_SetPeripheralReset()
76 while (0u == (RSTCTL1->PRSTCTL1 & bitMask)) in RESET_SetPeripheralReset()
81 RSTCTL1->PRSTCTL2_SET = bitMask; in RESET_SetPeripheralReset()
82 while (0u == (RSTCTL1->PRSTCTL2 & bitMask)) in RESET_SetPeripheralReset()
129 RSTCTL1->PRSTCTL0_CLR = bitMask; in RESET_ClearPeripheralReset()
130 while (bitMask == (RSTCTL1->PRSTCTL0 & bitMask)) in RESET_ClearPeripheralReset()
135 RSTCTL1->PRSTCTL1_CLR = bitMask; in RESET_ClearPeripheralReset()
136 while (bitMask == (RSTCTL1->PRSTCTL1 & bitMask)) in RESET_ClearPeripheralReset()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_reset.c69 RSTCTL1->PRSTCTL0_SET = bitMask; in RESET_SetPeripheralReset()
70 while (0u == (RSTCTL1->PRSTCTL0 & bitMask)) in RESET_SetPeripheralReset()
75 RSTCTL1->PRSTCTL1_SET = bitMask; in RESET_SetPeripheralReset()
76 while (0u == (RSTCTL1->PRSTCTL1 & bitMask)) in RESET_SetPeripheralReset()
81 RSTCTL1->PRSTCTL2_SET = bitMask; in RESET_SetPeripheralReset()
82 while (0u == (RSTCTL1->PRSTCTL2 & bitMask)) in RESET_SetPeripheralReset()
129 RSTCTL1->PRSTCTL0_CLR = bitMask; in RESET_ClearPeripheralReset()
130 while (bitMask == (RSTCTL1->PRSTCTL0 & bitMask)) in RESET_ClearPeripheralReset()
135 RSTCTL1->PRSTCTL1_CLR = bitMask; in RESET_ClearPeripheralReset()
136 while (bitMask == (RSTCTL1->PRSTCTL1 & bitMask)) in RESET_ClearPeripheralReset()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_reset.c69 RSTCTL1->PRSTCTL0_SET = bitMask; in RESET_SetPeripheralReset()
70 while (0u == (RSTCTL1->PRSTCTL0 & bitMask)) in RESET_SetPeripheralReset()
75 RSTCTL1->PRSTCTL1_SET = bitMask; in RESET_SetPeripheralReset()
76 while (0u == (RSTCTL1->PRSTCTL1 & bitMask)) in RESET_SetPeripheralReset()
81 RSTCTL1->PRSTCTL2_SET = bitMask; in RESET_SetPeripheralReset()
82 while (0u == (RSTCTL1->PRSTCTL2 & bitMask)) in RESET_SetPeripheralReset()
129 RSTCTL1->PRSTCTL0_CLR = bitMask; in RESET_ClearPeripheralReset()
130 while (bitMask == (RSTCTL1->PRSTCTL0 & bitMask)) in RESET_ClearPeripheralReset()
135 RSTCTL1->PRSTCTL1_CLR = bitMask; in RESET_ClearPeripheralReset()
136 while (bitMask == (RSTCTL1->PRSTCTL1 & bitMask)) in RESET_ClearPeripheralReset()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/drivers/
Dfsl_reset.c68 RSTCTL1->PRSTCTL0_SET = bitMask; in RESET_SetPeripheralReset()
69 while (0u == (RSTCTL1->PRSTCTL0 & bitMask)) in RESET_SetPeripheralReset()
74 RSTCTL1->PRSTCTL1_SET = bitMask; in RESET_SetPeripheralReset()
75 while (0u == (RSTCTL1->PRSTCTL1 & bitMask)) in RESET_SetPeripheralReset()
80 RSTCTL1->PRSTCTL2_SET = bitMask; in RESET_SetPeripheralReset()
81 while (0u == (RSTCTL1->PRSTCTL2 & bitMask)) in RESET_SetPeripheralReset()
128 RSTCTL1->PRSTCTL0_CLR = bitMask; in RESET_ClearPeripheralReset()
129 while (bitMask == (RSTCTL1->PRSTCTL0 & bitMask)) in RESET_ClearPeripheralReset()
134 RSTCTL1->PRSTCTL1_CLR = bitMask; in RESET_ClearPeripheralReset()
135 while (bitMask == (RSTCTL1->PRSTCTL1 & bitMask)) in RESET_ClearPeripheralReset()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/drivers/
Dfsl_reset.c68 RSTCTL1->PRSTCTL0_SET = bitMask; in RESET_SetPeripheralReset()
69 while (0u == (RSTCTL1->PRSTCTL0 & bitMask)) in RESET_SetPeripheralReset()
74 RSTCTL1->PRSTCTL1_SET = bitMask; in RESET_SetPeripheralReset()
75 while (0u == (RSTCTL1->PRSTCTL1 & bitMask)) in RESET_SetPeripheralReset()
80 RSTCTL1->PRSTCTL2_SET = bitMask; in RESET_SetPeripheralReset()
81 while (0u == (RSTCTL1->PRSTCTL2 & bitMask)) in RESET_SetPeripheralReset()
128 RSTCTL1->PRSTCTL0_CLR = bitMask; in RESET_ClearPeripheralReset()
129 while (bitMask == (RSTCTL1->PRSTCTL0 & bitMask)) in RESET_ClearPeripheralReset()
134 RSTCTL1->PRSTCTL1_CLR = bitMask; in RESET_ClearPeripheralReset()
135 while (bitMask == (RSTCTL1->PRSTCTL1 & bitMask)) in RESET_ClearPeripheralReset()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_cm33.h27482 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE) macro
27488 #define RSTCTL1_BASE_PTRS { RSTCTL1 }
27497 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE) macro
27501 #define RSTCTL1_BASE_PTRS { RSTCTL1 }
DMIMXRT685S_dsp.h19644 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE) macro
19648 #define RSTCTL1_BASE_PTRS { RSTCTL1 }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h27482 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE) macro
27488 #define RSTCTL1_BASE_PTRS { RSTCTL1 }
27497 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE) macro
27501 #define RSTCTL1_BASE_PTRS { RSTCTL1 }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h38011 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE) macro
38017 #define RSTCTL1_BASE_PTRS { RSTCTL1 }
38026 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE) macro
38030 #define RSTCTL1_BASE_PTRS { RSTCTL1 }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h39637 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE) macro
39643 #define RSTCTL1_BASE_PTRS { RSTCTL1 }
39652 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE) macro
39656 #define RSTCTL1_BASE_PTRS { RSTCTL1 }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_cm33.h39638 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE) macro
39644 #define RSTCTL1_BASE_PTRS { RSTCTL1 }
39653 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE) macro
39657 #define RSTCTL1_BASE_PTRS { RSTCTL1 }
DMIMXRT595S_dsp.h32331 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE) macro
32335 #define RSTCTL1_BASE_PTRS { RSTCTL1 }
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/
DRW610.h55226 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE) macro
55232 #define RSTCTL1_BASE_PTRS { RSTCTL1 }
55241 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE) macro
55245 #define RSTCTL1_BASE_PTRS { RSTCTL1 }
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/
DRW612.h55226 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE) macro
55232 #define RSTCTL1_BASE_PTRS { RSTCTL1 }
55241 #define RSTCTL1 ((RSTCTL1_Type *)RSTCTL1_BASE) macro
55245 #define RSTCTL1_BASE_PTRS { RSTCTL1 }