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Searched refs:RSTCTL0_PRSTCTL2_SET_XSPI1_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h61338 #define RSTCTL0_PRSTCTL2_SET_XSPI1_MASK (0x800U) macro
61344 …(uint32_t)(((uint32_t)(x)) << RSTCTL0_PRSTCTL2_SET_XSPI1_SHIFT)) & RSTCTL0_PRSTCTL2_SET_XSPI1_MASK)
DMIMXRT798S_cm33_core0.h61423 #define RSTCTL0_PRSTCTL2_SET_XSPI1_MASK (0x800U) macro
61429 …(uint32_t)(((uint32_t)(x)) << RSTCTL0_PRSTCTL2_SET_XSPI1_SHIFT)) & RSTCTL0_PRSTCTL2_SET_XSPI1_MASK)
DMIMXRT798S_ezhv.h61228 #define RSTCTL0_PRSTCTL2_SET_XSPI1_MASK (0x800U) macro
61234 …(uint32_t)(((uint32_t)(x)) << RSTCTL0_PRSTCTL2_SET_XSPI1_SHIFT)) & RSTCTL0_PRSTCTL2_SET_XSPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h58059 #define RSTCTL0_PRSTCTL2_SET_XSPI1_MASK (0x800U) macro
58065 …(uint32_t)(((uint32_t)(x)) << RSTCTL0_PRSTCTL2_SET_XSPI1_SHIFT)) & RSTCTL0_PRSTCTL2_SET_XSPI1_MASK)
DMIMXRT735S_cm33_core0.h58198 #define RSTCTL0_PRSTCTL2_SET_XSPI1_MASK (0x800U) macro
58204 …(uint32_t)(((uint32_t)(x)) << RSTCTL0_PRSTCTL2_SET_XSPI1_SHIFT)) & RSTCTL0_PRSTCTL2_SET_XSPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h61423 #define RSTCTL0_PRSTCTL2_SET_XSPI1_MASK (0x800U) macro
61429 …(uint32_t)(((uint32_t)(x)) << RSTCTL0_PRSTCTL2_SET_XSPI1_SHIFT)) & RSTCTL0_PRSTCTL2_SET_XSPI1_MASK)
DMIMXRT758S_ezhv.h61204 #define RSTCTL0_PRSTCTL2_SET_XSPI1_MASK (0x800U) macro
61210 …(uint32_t)(((uint32_t)(x)) << RSTCTL0_PRSTCTL2_SET_XSPI1_SHIFT)) & RSTCTL0_PRSTCTL2_SET_XSPI1_MASK)