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Searched refs:RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h61418 #define RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_MASK (0x40000000U) macro
61424 …int32_t)(x)) << RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_SHIFT)) & RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_MASK)
DMIMXRT798S_cm33_core0.h61503 #define RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_MASK (0x40000000U) macro
61509 …int32_t)(x)) << RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_SHIFT)) & RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_MASK)
DMIMXRT798S_ezhv.h61308 #define RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_MASK (0x40000000U) macro
61314 …int32_t)(x)) << RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_SHIFT)) & RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h58139 #define RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_MASK (0x40000000U) macro
58145 …int32_t)(x)) << RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_SHIFT)) & RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_MASK)
DMIMXRT735S_cm33_core0.h58278 #define RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_MASK (0x40000000U) macro
58284 …int32_t)(x)) << RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_SHIFT)) & RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h61503 #define RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_MASK (0x40000000U) macro
61509 …int32_t)(x)) << RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_SHIFT)) & RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_MASK)
DMIMXRT758S_ezhv.h61284 #define RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_MASK (0x40000000U) macro
61290 …int32_t)(x)) << RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_SHIFT)) & RSTCTL0_PRSTCTL2_SET_LP_FLEXCOMM0_MASK)