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Searched refs:RSTCTL0_PRSTCTL1_CLR_ACMP0_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h18589 #define RSTCTL0_PRSTCTL1_CLR_ACMP0_MASK (0x8000U) macro
18595 …(uint32_t)(((uint32_t)(x)) << RSTCTL0_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL0_PRSTCTL1_CLR_ACMP0_MASK)
DMIMXRT685S_cm33.h26405 #define RSTCTL0_PRSTCTL1_CLR_ACMP0_MASK (0x8000U) macro
26411 …(uint32_t)(((uint32_t)(x)) << RSTCTL0_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL0_PRSTCTL1_CLR_ACMP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h26405 #define RSTCTL0_PRSTCTL1_CLR_ACMP0_MASK (0x8000U) macro
26411 …(uint32_t)(((uint32_t)(x)) << RSTCTL0_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL0_PRSTCTL1_CLR_ACMP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h31060 #define RSTCTL0_PRSTCTL1_CLR_ACMP0_MASK (0x8000U) macro
31066 …(uint32_t)(((uint32_t)(x)) << RSTCTL0_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL0_PRSTCTL1_CLR_ACMP0_MASK)
DMIMXRT595S_cm33.h38345 #define RSTCTL0_PRSTCTL1_CLR_ACMP0_MASK (0x8000U) macro
38351 …(uint32_t)(((uint32_t)(x)) << RSTCTL0_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL0_PRSTCTL1_CLR_ACMP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h36718 #define RSTCTL0_PRSTCTL1_CLR_ACMP0_MASK (0x8000U) macro
36724 …(uint32_t)(((uint32_t)(x)) << RSTCTL0_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL0_PRSTCTL1_CLR_ACMP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h38344 #define RSTCTL0_PRSTCTL1_CLR_ACMP0_MASK (0x8000U) macro
38350 …(uint32_t)(((uint32_t)(x)) << RSTCTL0_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL0_PRSTCTL1_CLR_ACMP0_MASK)