| /hal_nxp-latest/mcux/mcux-sdk/drivers/elemu/ |
| D | fsl_elemu.c | 62 while ((mu->RSR & mask) == 0u) in ELEMU_mu_hal_receive_data() 66 while (((mu->RSR & mask) != 0u) && (read_retries != 0u)) in ELEMU_mu_hal_receive_data() 78 while ((mu->RSR & mask) == 0u) in ELEMU_mu_hal_receive_data_wait() 89 while (((mu->RSR & mask) != 0u) && (read_retries != 0u)) in ELEMU_mu_hal_receive_data_wait()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/s3mu/ |
| D | fsl_s3mu.c | 172 while ((mu->RSR & mask) == 0u) in s3mu_hal_receive_data() 253 while ((mu->RSR & mask) == 0u) in s3mu_hal_receive_data_wait()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/mu1/ |
| D | fsl_mu.c | 133 while (0U == (base->RSR & (1UL << regIndex))) in MU_ReceiveMsg() 194 flags |= MU_RX_FLAG(base->RSR); in MU_GetStatusFlags()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9352/drivers/ |
| D | fsl_sentinel.c | 29 __I uint32_t RSR; /**< Receive Status Register, offset: 0x12C */ member 124 while ((SENTINEL__MUA_RTD->RSR & MU_RSR_RF0_MASK) == 0U) in SENTINEL_ReceiveMessage() 142 while ((SENTINEL__MUA_RTD->RSR & ((uint32_t)MU_RSR_RF0_MASK << i)) == 0U) in SENTINEL_ReceiveMessage()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/drivers/upower/ |
| D | upower_api.c | 259 if (mu->RSR.R != 0UL) { /* Rx ISR occurred */ in upwr_txrx_isr() 635 if (mu->RSR.B.RF0 != 0U) { /* first clean any Rx message left over */ in upwr_init() 658 while (mu->RSR.B.RF0 == 0U) { in upwr_init() 3143 unsigned int len = mu->RSR.R; in upwr_rx()
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| D | upmu.h | 327 MU_RSR_tag RSR; // RSR Register member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/drivers/upower/ |
| D | upower_api.c | 259 if (mu->RSR.R != 0UL) { /* Rx ISR occurred */ in upwr_txrx_isr() 635 if (mu->RSR.B.RF0 != 0U) { /* first clean any Rx message left over */ in upwr_init() 658 while (mu->RSR.B.RF0 == 0U) { in upwr_init() 3143 unsigned int len = mu->RSR.R; in upwr_rx()
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| D | upmu.h | 327 MU_RSR_tag RSR; // RSR Register member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/drivers/upower/ |
| D | upower_api.c | 259 if (mu->RSR.R != 0UL) { /* Rx ISR occurred */ in upwr_txrx_isr() 635 if (mu->RSR.B.RF0 != 0U) { /* first clean any Rx message left over */ in upwr_init() 658 while (mu->RSR.B.RF0 == 0U) { in upwr_init() 3143 unsigned int len = mu->RSR.R; in upwr_rx()
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| D | upmu.h | 327 MU_RSR_tag RSR; // RSR Register member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/drivers/upower/ |
| D | upower_api.c | 259 if (mu->RSR.R != 0UL) { /* Rx ISR occurred */ in upwr_txrx_isr() 635 if (mu->RSR.B.RF0 != 0U) { /* first clean any Rx message left over */ in upwr_init() 658 while (mu->RSR.B.RF0 == 0U) { in upwr_init() 3143 unsigned int len = mu->RSR.R; in upwr_rx()
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| D | upmu.h | 327 MU_RSR_tag RSR; // RSR Register member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/drivers/upower/ |
| D | upower_api.c | 259 if (mu->RSR.R != 0UL) { /* Rx ISR occurred */ in upwr_txrx_isr() 635 if (mu->RSR.B.RF0 != 0U) { /* first clean any Rx message left over */ in upwr_init() 658 while (mu->RSR.B.RF0 == 0U) { in upwr_init() 3143 unsigned int len = mu->RSR.R; in upwr_rx()
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| D | upmu.h | 327 MU_RSR_tag RSR; // RSR Register member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/drivers/ |
| D | fsl_sentinel.c | 90 while ((SENTINEL__MUA_RTD->RSR & MU_RSR_RF0_MASK) == 0U) in SENTINEL_ReceiveMessage() 108 while ((SENTINEL__MUA_RTD->RSR & ((uint32_t)MU_RSR_RF0_MASK << i)) == 0U) in SENTINEL_ReceiveMessage()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/drivers/ |
| D | fsl_sentinel.c | 90 while ((SENTINEL__MUA_RTD->RSR & MU_RSR_RF0_MASK) == 0U) in SENTINEL_ReceiveMessage() 108 while ((SENTINEL__MUA_RTD->RSR & ((uint32_t)MU_RSR_RF0_MASK << i)) == 0U) in SENTINEL_ReceiveMessage()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/drivers/ |
| D | fsl_sentinel.c | 90 while ((SENTINEL__MUA_RTD->RSR & MU_RSR_RF0_MASK) == 0U) in SENTINEL_ReceiveMessage() 108 while ((SENTINEL__MUA_RTD->RSR & ((uint32_t)MU_RSR_RF0_MASK << i)) == 0U) in SENTINEL_ReceiveMessage()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/drivers/ |
| D | fsl_sentinel.c | 90 while ((SENTINEL__MUA_RTD->RSR & MU_RSR_RF0_MASK) == 0U) in SENTINEL_ReceiveMessage() 108 while ((SENTINEL__MUA_RTD->RSR & ((uint32_t)MU_RSR_RF0_MASK << i)) == 0U) in SENTINEL_ReceiveMessage()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/drivers/ |
| D | fsl_sentinel.c | 90 while ((SENTINEL__MUA_RTD->RSR & MU_RSR_RF0_MASK) == 0U) in SENTINEL_ReceiveMessage() 108 while ((SENTINEL__MUA_RTD->RSR & ((uint32_t)MU_RSR_RF0_MASK << i)) == 0U) in SENTINEL_ReceiveMessage()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/spm/ |
| D | fsl_spm.c | 28 …volatile uint32_t tmp32 = base->RSR; /* volatile here is to make sure this value is actually from … in SPM_GetRegulatorStatus()
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| /hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/ |
| D | S32K116_LPSPI.h | 93 __I uint32_t RSR; /**< Receive Status Register, offset: 0x70 */ member
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| D | S32K148_LPSPI.h | 93 __I uint32_t RSR; /**< Receive Status Register, offset: 0x70 */ member
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| D | S32K118_LPSPI.h | 93 __I uint32_t RSR; /**< Receive Status Register, offset: 0x70 */ member
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| D | S32K144_LPSPI.h | 93 __I uint32_t RSR; /**< Receive Status Register, offset: 0x70 */ member
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| D | S32K146_LPSPI.h | 93 __I uint32_t RSR; /**< Receive Status Register, offset: 0x70 */ member
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