/hal_nxp-latest/mcux/mcux-sdk/drivers/qspi/ |
D | fsl_qspi.h | 455 base->RSER |= mask; in QSPI_EnableInterrupts() 466 base->RSER &= ~mask; in QSPI_DisableInterrupts() 487 base->RSER |= mask; in QSPI_EnableDMA() 491 base->RSER &= ~mask; in QSPI_EnableDMA()
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/hal_nxp-latest/mcux/mcux-sdk/drivers/xspi/ |
D | fsl_xspi.h | 1180 base->RSER |= mask; in XSPI_EnableInterrupts() 1191 base->RSER &= ~mask; in XSPI_DisableInterrupts() 1209 base->RSER |= XSPI_RSER_TBFDE_MASK; in XSPI_EnableTxDMA() 1213 base->RSER &= ~XSPI_RSER_TBFDE_MASK; in XSPI_EnableTxDMA() 1227 base->RSER |= XSPI_RSER_RBDDE_MASK; in XSPI_EnableRxDMA() 1231 base->RSER &= ~XSPI_RSER_RBDDE_MASK; in XSPI_EnableRxDMA()
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/hal_nxp-latest/s32/drivers/s32k3/Fls/include/ |
D | Qspi_Ip_HwAccess.h | 802 BaseAddr->RSER |= QuadSPI_RSER_TBFDE_MASK; in Qspi_Ip_EnableTxDmaReq() 811 BaseAddr->RSER |= QuadSPI_RSER_RBDDE_MASK; in Qspi_Ip_EnableRxDmaReq() 820 BaseAddr->RSER &= ~(QuadSPI_RSER_TBFDE_MASK | QuadSPI_RSER_RBDDE_MASK); in Qspi_Ip_DisableDmaReq() 887 BaseAddr->RSER |= Mask; in Qspi_Ip_EnableInt() 898 BaseAddr->RSER &= ~Mask; in Qspi_Ip_DisableInt()
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/hal_nxp-latest/s32/drivers/s32ze/Spi/src/ |
D | Spi_Ip.c | 365 Base->RSER = 0U; in Spi_Ip_TransferProcess() 1078 Base->RSER = SPI_RSER_CMDFFF_RE(1) | SPI_RSER_CMDFFF_DIRS(1) | in Spi_Ip_DmaAsyncStart() 1285 Base->RSER = SPI_RSER_TCF_RE(1) | SPI_RSER_TFUF_RE(1) | SPI_RSER_RFOF_RE(1); in Spi_Ip_AsyncStart() 1434 Base->RSER = 0U; in Spi_Ip_IrqDmaHandler() 1561 Base->RSER = 0u; in Spi_Ip_DeInit() 1759 Base->RSER = 0U; in Spi_Ip_AsyncTransmit() 1863 …Base->RSER = SPI_RSER_CMDFFF_RE(1u) | SPI_RSER_CMDFFF_DIRS(1u) | SPI_RSER_TFFF_RE(1u) | SPI_RSER_T… in Spi_Ip_AsyncTransmitFast() 2188 Base->RSER = 0U; in Spi_Ip_Cancel() 2229 … IrqFlags &= Base->RSER & (SPI_RSER_TCF_RE_MASK | SPI_RSER_RFOF_RE_MASK | SPI_RSER_TFUF_RE_MASK); in Spi_Ip_IrqHandler()
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/hal_nxp-latest/mcux/mcux-sdk/drivers/dspi/ |
D | fsl_dspi.h | 624 base->RSER &= ~mask; in DSPI_DisableInterrupts() 649 base->RSER |= mask; in DSPI_EnableDMA() 665 base->RSER &= ~mask; in DSPI_DisableDMA()
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D | fsl_dspi.c | 851 base->RSER &= ~SPI_RSER_TFFF_DIRS_MASK; in DSPI_EnableInterrupts() 855 base->RSER &= ~SPI_RSER_RFDF_DIRS_MASK; in DSPI_EnableInterrupts() 857 base->RSER |= mask; in DSPI_EnableInterrupts() 2189 if (0U != (base->RSER & SPI_RSER_TFUF_RE_MASK)) in DSPI_SlaveTransferHandleIRQ() 2205 if (0U != (base->RSER & SPI_RSER_RFOF_RE_MASK)) in DSPI_SlaveTransferHandleIRQ()
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/hal_nxp-latest/s32/drivers/s32ze/Mem_EXFLS/include/ |
D | Qspi_Ip_HwAccess.h | 1123 BaseAddr->RSER |= QuadSPI_RSER_TBFDE_MASK; in Qspi_Ip_EnableTxDmaReq() 1132 BaseAddr->RSER |= QuadSPI_RSER_RBDDE_MASK; in Qspi_Ip_EnableRxDmaReq() 1141 BaseAddr->RSER &= ~(QuadSPI_RSER_TBFDE_MASK | QuadSPI_RSER_RBDDE_MASK); in Qspi_Ip_DisableDmaReq() 1211 BaseAddr->RSER |= Mask; in Qspi_Ip_EnableInt() 1222 BaseAddr->RSER &= ~Mask; in Qspi_Ip_DisableInt()
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/hal_nxp-latest/s32/drivers/s32k3/Fls/src/ |
D | Qspi_Ip_Controller.c | 1988 BaseAddr->RSER = (uint32)0x00000000UL; in Qspi_Ip_ResetAllRegisters() 2047 BaseAddr->RSER = (uint32)0x00000000UL; in Qspi_Ip_ResetAllRegisters()
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/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/ |
D | S32Z2_SPI.h | 89 …__IO uint32_t RSER; /**< DMA/Interrupt Request Select and Enable Regi… member
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D | S32Z2_DSPI.h | 87 …__IO uint32_t RSER; /**< DMA/Interrupt Request Select and Enable Regi… member
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D | S32Z2_QUADSPI.h | 119 …__IO uint32_t RSER; /**< Interrupt and DMA Request Select and Enable … member
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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/ |
D | S32K148_QUADSPI.h | 103 …__IO uint32_t RSER; /**< Interrupt and DMA Request Select and Enable … member
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/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/ |
D | S32K344_QUADSPI.h | 109 …__IO uint32_t RSER; /**< Interrupt and DMA Request Select and Enable … member
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/hal_nxp-latest/s32/drivers/s32ze/Mem_EXFLS/src/ |
D | Qspi_Ip_Controller.c | 2320 BaseAddr->RSER = (uint32)0x00000000UL; in Qspi_Ip_ResetAllRegisters()
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/hal_nxp-latest/s32/mcux/devices/S32Z270/ |
D | S32Z270_device.h | 2499 …__IO uint32_t RSER; /**< DMA/Interrupt Request Select and Enable Regi… member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/ |
D | MK02F12810.h | 9075 …__IO uint32_t RSER; /**< DMA/Interrupt Request Select and Enable Regi… member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/ |
D | MKV30F12810.h | 9108 …__IO uint32_t RSER; /**< DMA/Interrupt Request Select and Enable Regi… member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/ |
D | MKV10Z7.h | 9016 …__IO uint32_t RSER; /**< DMA/Interrupt Request Select and Enable Regi… member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/ |
D | MKV31F12810.h | 9894 …__IO uint32_t RSER; /**< DMA/Interrupt Request Select and Enable Regi… member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/ |
D | MKV10Z1287.h | 10052 …__IO uint32_t RSER; /**< DMA/Interrupt Request Select and Enable Regi… member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKW30Z4/ |
D | MKW30Z4.h | 7358 …__IO uint32_t RSER; /**< DMA/Interrupt Request Select and Enable Regi… member 7393 #define SPI_RSER_REG(base) ((base)->RSER)
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKW20Z4/ |
D | MKW20Z4.h | 7358 …__IO uint32_t RSER; /**< DMA/Interrupt Request Select and Enable Regi… member 7393 #define SPI_RSER_REG(base) ((base)->RSER)
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKW40Z4/ |
D | MKW40Z4.h | 7358 …__IO uint32_t RSER; /**< DMA/Interrupt Request Select and Enable Regi… member 7393 #define SPI_RSER_REG(base) ((base)->RSER)
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/ |
D | MKV11Z7.h | 10840 …__IO uint32_t RSER; /**< DMA/Interrupt Request Select and Enable Regi… member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/ |
D | MKV31F25612.h | 10965 …__IO uint32_t RSER; /**< DMA/Interrupt Request Select and Enable Regi… member
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