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Searched refs:ROSCCSR (Results 1 – 25 of 46) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/drivers/
Dfsl_clock.h1157 return (bool)(CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCERR_MASK); in CLOCK_IsRoscErr()
1165 CLOCK_REG(&SCG0->ROSCCSR) |= SCG_ROSCCSR_ROSCERR_MASK; in CLOCK_ClearRoscErr()
1178 uint32_t reg = CLOCK_REG(&SCG0->ROSCCSR); in CLOCK_SetRoscMonitorMode()
1184 CLOCK_REG(&SCG0->ROSCCSR) = reg; in CLOCK_SetRoscMonitorMode()
1194 return (bool)(CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCVLD_MASK); in CLOCK_IsRoscValid()
1202 CLOCK_REG(&SCG0->ROSCCSR) &= ~(SCG_ROSCCSR_LK_MASK); in CLOCK_UnlockRoscControlStatusReg()
1210 CLOCK_REG(&SCG0->ROSCCSR) |= SCG_ROSCCSR_LK_MASK; in CLOCK_LockRoscControlStatusReg()
Dfsl_clock.c644 while ((CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCVLD_MASK) != SCG_ROSCCSR_ROSCVLD_MASK) in CLOCK_InitRosc()
664 uint32_t reg = CLOCK_REG(&SCG0->ROSCCSR); in CLOCK_DeinitRosc()
678 CLOCK_REG(&SCG0->ROSCCSR) = SCG_ROSCCSR_ROSCERR_MASK; in CLOCK_DeinitRosc()
690 if ((CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCVLD_MASK) == in CLOCK_GetRtcOscFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/drivers/
Dfsl_clock.h1157 return (bool)(CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCERR_MASK); in CLOCK_IsRoscErr()
1165 CLOCK_REG(&SCG0->ROSCCSR) |= SCG_ROSCCSR_ROSCERR_MASK; in CLOCK_ClearRoscErr()
1178 uint32_t reg = CLOCK_REG(&SCG0->ROSCCSR); in CLOCK_SetRoscMonitorMode()
1184 CLOCK_REG(&SCG0->ROSCCSR) = reg; in CLOCK_SetRoscMonitorMode()
1194 return (bool)(CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCVLD_MASK); in CLOCK_IsRoscValid()
1202 CLOCK_REG(&SCG0->ROSCCSR) &= ~(SCG_ROSCCSR_LK_MASK); in CLOCK_UnlockRoscControlStatusReg()
1210 CLOCK_REG(&SCG0->ROSCCSR) |= SCG_ROSCCSR_LK_MASK; in CLOCK_LockRoscControlStatusReg()
Dfsl_clock.c644 while ((CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCVLD_MASK) != SCG_ROSCCSR_ROSCVLD_MASK) in CLOCK_InitRosc()
664 uint32_t reg = CLOCK_REG(&SCG0->ROSCCSR); in CLOCK_DeinitRosc()
678 CLOCK_REG(&SCG0->ROSCCSR) = SCG_ROSCCSR_ROSCERR_MASK; in CLOCK_DeinitRosc()
690 if ((CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCVLD_MASK) == in CLOCK_GetRtcOscFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/drivers/
Dfsl_clock.h1219 return (bool)(CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCERR_MASK); in CLOCK_IsRoscErr()
1227 CLOCK_REG(&SCG0->ROSCCSR) |= SCG_ROSCCSR_ROSCERR_MASK; in CLOCK_ClearRoscErr()
1240 uint32_t reg = CLOCK_REG(&SCG0->ROSCCSR); in CLOCK_SetRoscMonitorMode()
1246 CLOCK_REG(&SCG0->ROSCCSR) = reg; in CLOCK_SetRoscMonitorMode()
1256 return (bool)(CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCVLD_MASK); in CLOCK_IsRoscValid()
1264 CLOCK_REG(&SCG0->ROSCCSR) &= ~(SCG_ROSCCSR_LK_MASK); in CLOCK_UnlockRoscControlStatusReg()
1272 CLOCK_REG(&SCG0->ROSCCSR) |= SCG_ROSCCSR_LK_MASK; in CLOCK_LockRoscControlStatusReg()
Dfsl_clock.c645 while ((CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCVLD_MASK) != SCG_ROSCCSR_ROSCVLD_MASK) in CLOCK_InitRosc()
665 uint32_t reg = CLOCK_REG(&SCG0->ROSCCSR); in CLOCK_DeinitRosc()
679 CLOCK_REG(&SCG0->ROSCCSR) = SCG_ROSCCSR_ROSCERR_MASK; in CLOCK_DeinitRosc()
691 if ((CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCVLD_MASK) == in CLOCK_GetRtcOscFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/drivers/
Dfsl_clock.h1222 return (bool)(SCG->ROSCCSR & SCG_ROSCCSR_ROSCERR_MASK); in CLOCK_IsRtcOscErr()
1230 SCG->ROSCCSR |= SCG_ROSCCSR_ROSCERR_MASK; in CLOCK_ClearRtcOscErr()
1243 uint32_t reg = SCG->ROSCCSR; in CLOCK_SetRtcOscMonitorMode()
1249 SCG->ROSCCSR = reg; in CLOCK_SetRtcOscMonitorMode()
1259 return (bool)(SCG->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK); in CLOCK_IsRtcOscValid()
Dfsl_clock.c677 if ((SCG->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) != 0UL) /* RTC OSC clock is valid. */ in CLOCK_GetRtcOscFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/drivers/
Dfsl_clock.h1500 return ((SCG->ROSCCSR & SCG_ROSCCSR_ROSCERR_MASK) == SCG_ROSCCSR_ROSCERR_MASK); in CLOCK_IsRtcOscErr()
1508 SCG->ROSCCSR |= SCG_ROSCCSR_ROSCERR_MASK; in CLOCK_ClearRtcOscErr()
1521 uint32_t reg = SCG->ROSCCSR; in CLOCK_SetRtcOscMonitorMode()
1527 SCG->ROSCCSR = reg; in CLOCK_SetRtcOscMonitorMode()
1537 return ((SCG->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) == SCG_ROSCCSR_ROSCVLD_MASK); in CLOCK_IsRtcOscValid()
Dfsl_clock.c1052 if ((SCG->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) != 0UL) /* RTC OSC clock is valid. */ in CLOCK_GetRtcOscFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/drivers/
Dfsl_clock.h1500 return ((SCG->ROSCCSR & SCG_ROSCCSR_ROSCERR_MASK) == SCG_ROSCCSR_ROSCERR_MASK); in CLOCK_IsRtcOscErr()
1508 SCG->ROSCCSR |= SCG_ROSCCSR_ROSCERR_MASK; in CLOCK_ClearRtcOscErr()
1521 uint32_t reg = SCG->ROSCCSR; in CLOCK_SetRtcOscMonitorMode()
1527 SCG->ROSCCSR = reg; in CLOCK_SetRtcOscMonitorMode()
1537 return ((SCG->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) == SCG_ROSCCSR_ROSCVLD_MASK); in CLOCK_IsRtcOscValid()
Dfsl_clock.c1052 if ((SCG->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) != 0UL) /* RTC OSC clock is valid. */ in CLOCK_GetRtcOscFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/drivers/
Dfsl_clock.c333 SCG0->ROSCCSR = SCG_ROSCCSR_ROSCERR_MASK; in CLOCK_SetupOsc32KClocking()
336 SCG0->ROSCCSR &= ~SCG_ROSCCSR_LK_MASK; in CLOCK_SetupOsc32KClocking()
339 SCG0->ROSCCSR |= SCG_ROSCCSR_ROSCCM_MASK; in CLOCK_SetupOsc32KClocking()
342 while ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) == 0U) in CLOCK_SetupOsc32KClocking()
449 uint32_t reg = SCG0->ROSCCSR; in CLOCK_SetRoscMonitorMode()
455 SCG0->ROSCCSR = reg; in CLOCK_SetRoscMonitorMode()
1916 return ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) != 0UL) ? in CLOCK_GetOsc32KFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/drivers/
Dfsl_clock.c333 SCG0->ROSCCSR = SCG_ROSCCSR_ROSCERR_MASK; in CLOCK_SetupOsc32KClocking()
336 SCG0->ROSCCSR &= ~SCG_ROSCCSR_LK_MASK; in CLOCK_SetupOsc32KClocking()
339 SCG0->ROSCCSR |= SCG_ROSCCSR_ROSCCM_MASK; in CLOCK_SetupOsc32KClocking()
342 while ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) == 0U) in CLOCK_SetupOsc32KClocking()
449 uint32_t reg = SCG0->ROSCCSR; in CLOCK_SetRoscMonitorMode()
455 SCG0->ROSCCSR = reg; in CLOCK_SetRoscMonitorMode()
1916 return ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) != 0UL) ? in CLOCK_GetOsc32KFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/drivers/
Dfsl_clock.c349 SCG0->ROSCCSR = SCG_ROSCCSR_ROSCERR_MASK; in CLOCK_SetupOsc32KClocking()
352 SCG0->ROSCCSR &= ~SCG_ROSCCSR_LK_MASK; in CLOCK_SetupOsc32KClocking()
355 SCG0->ROSCCSR |= SCG_ROSCCSR_ROSCCM_MASK; in CLOCK_SetupOsc32KClocking()
358 while ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) == 0U) in CLOCK_SetupOsc32KClocking()
465 uint32_t reg = SCG0->ROSCCSR; in CLOCK_SetRoscMonitorMode()
471 SCG0->ROSCCSR = reg; in CLOCK_SetRoscMonitorMode()
2330 return ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) != 0UL) ? in CLOCK_GetOsc32KFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/drivers/
Dfsl_clock.c349 SCG0->ROSCCSR = SCG_ROSCCSR_ROSCERR_MASK; in CLOCK_SetupOsc32KClocking()
352 SCG0->ROSCCSR &= ~SCG_ROSCCSR_LK_MASK; in CLOCK_SetupOsc32KClocking()
355 SCG0->ROSCCSR |= SCG_ROSCCSR_ROSCCM_MASK; in CLOCK_SetupOsc32KClocking()
358 while ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) == 0U) in CLOCK_SetupOsc32KClocking()
465 uint32_t reg = SCG0->ROSCCSR; in CLOCK_SetRoscMonitorMode()
471 SCG0->ROSCCSR = reg; in CLOCK_SetRoscMonitorMode()
2330 return ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) != 0UL) ? in CLOCK_GetOsc32KFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/drivers/
Dfsl_clock.c349 SCG0->ROSCCSR = SCG_ROSCCSR_ROSCERR_MASK; in CLOCK_SetupOsc32KClocking()
352 SCG0->ROSCCSR &= ~SCG_ROSCCSR_LK_MASK; in CLOCK_SetupOsc32KClocking()
355 SCG0->ROSCCSR |= SCG_ROSCCSR_ROSCCM_MASK; in CLOCK_SetupOsc32KClocking()
358 while ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) == 0U) in CLOCK_SetupOsc32KClocking()
465 uint32_t reg = SCG0->ROSCCSR; in CLOCK_SetRoscMonitorMode()
471 SCG0->ROSCCSR = reg; in CLOCK_SetRoscMonitorMode()
2330 return ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) != 0UL) ? in CLOCK_GetOsc32KFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/drivers/
Dfsl_clock.c349 SCG0->ROSCCSR = SCG_ROSCCSR_ROSCERR_MASK; in CLOCK_SetupOsc32KClocking()
352 SCG0->ROSCCSR &= ~SCG_ROSCCSR_LK_MASK; in CLOCK_SetupOsc32KClocking()
355 SCG0->ROSCCSR |= SCG_ROSCCSR_ROSCCM_MASK; in CLOCK_SetupOsc32KClocking()
358 while ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) == 0U) in CLOCK_SetupOsc32KClocking()
465 uint32_t reg = SCG0->ROSCCSR; in CLOCK_SetRoscMonitorMode()
471 SCG0->ROSCCSR = reg; in CLOCK_SetRoscMonitorMode()
2330 return ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) != 0UL) ? in CLOCK_GetOsc32KFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h17163 …__IO uint32_t ROSCCSR; /**< RTC OSC Control Status Register, offset: 0x4… member
DK32L3A60_cm0plus.h17273 …__IO uint32_t ROSCCSR; /**< RTC OSC Control Status Register, offset: 0x4… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h24613 …__IO uint32_t ROSCCSR; /**< ROSC Control Status Register, offset: 0x400 … member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h24613 …__IO uint32_t ROSCCSR; /**< ROSC Control Status Register, offset: 0x400 … member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h24613 …__IO uint32_t ROSCCSR; /**< ROSC Control Status Register, offset: 0x400 … member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h24613 …__IO uint32_t ROSCCSR; /**< ROSC Control Status Register, offset: 0x400 … member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h31858 …__IO uint32_t ROSCCSR; /**< ROSC Control Status Register, offset: 0x400 … member

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