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Searched refs:REG3 (Results 1 – 25 of 71) sorted by relevance

123

/hal_nxp-latest/mcux/mcux-sdk/drivers/dcdc_1/
Dfsl_dcdc.c541 tmp32 = base->REG3 & ~DCDC_REG3_MINPWR_DC_HALFCLK_MASK; in DCDC_SetMinPowerConfig()
546 base->REG3 = tmp32; in DCDC_SetMinPowerConfig()
572 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_AdjustTargetVoltage()
583 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_AdjustTargetVoltage()
622 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_AdjustRunTargetVoltage()
633 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_AdjustRunTargetVoltage()
672 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_AdjustLowPowerTargetVoltage()
683 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_AdjustLowPowerTargetVoltage()
723 base->REG3 &= ~DCDC_REG3_DISABLE_STEP_MASK; in DCDC_AdjustTargetVoltage()
726 tmp32 = base->REG3 & ~(DCDC_REG3_TARGET_LP_MASK | DCDC_REG3_TRG_MASK); in DCDC_AdjustTargetVoltage()
[all …]
Dfsl_dcdc.h527 base->REG3 |= DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_LockVdd1p0TargetVoltage()
537 base->REG3 |= DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_LockVdd1p8TargetVoltage()
593 base->REG3 |= DCDC_REG3_DISABLE_STEP_MASK; in DCDC_LockTargetVoltage()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_dcdc.h524 … base->REG3 |= DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK | DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnterLowPowerMode()
568 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0StandbyModeTargetVoltage()
600 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P8StandbyModeTargetVoltage()
631 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0BuckModeTargetVoltage()
661 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P8BuckModeTargetVoltage()
696 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
700 base->REG3 |= DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
717 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P8TargetVoltageStepping()
721 base->REG3 |= DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P8TargetVoltageStepping()
897 base->REG3 |= DCDC_REG3_MISC_DELAY_TIMING_MASK; in DCDC_EnableAdjustDelay()
[all …]
Dfsl_dcdc.c413 tmp32 = base->REG3 & ~DCDC_REG3_MINPWR_DC_HALFCLK_MASK; in DCDC_SetMinPowerConfig()
418 base->REG3 = tmp32; in DCDC_SetMinPowerConfig()
433 tmp32 = base->REG3 & ~DCDC_REG3_REG_FBK_SEL_MASK; in DCDC_SetInternalRegulatorConfig()
435 base->REG3 = tmp32; in DCDC_SetInternalRegulatorConfig()
504 base->REG3 &= ~(DCDC_REG3_DISABLE_IDLE_SKIP_MASK | DCDC_REG3_DISABLE_PULSE_SKIP_MASK); in DCDC_BootIntoDCM()
505 base->REG3 |= DCDC_REG3_ENABLE_FF_MASK; in DCDC_BootIntoDCM()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_dcdc.h524 … base->REG3 |= DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK | DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnterLowPowerMode()
568 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0StandbyModeTargetVoltage()
600 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P8StandbyModeTargetVoltage()
631 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0BuckModeTargetVoltage()
661 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P8BuckModeTargetVoltage()
696 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
700 base->REG3 |= DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
717 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P8TargetVoltageStepping()
721 base->REG3 |= DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P8TargetVoltageStepping()
897 base->REG3 |= DCDC_REG3_MISC_DELAY_TIMING_MASK; in DCDC_EnableAdjustDelay()
[all …]
Dfsl_dcdc.c413 tmp32 = base->REG3 & ~DCDC_REG3_MINPWR_DC_HALFCLK_MASK; in DCDC_SetMinPowerConfig()
418 base->REG3 = tmp32; in DCDC_SetMinPowerConfig()
433 tmp32 = base->REG3 & ~DCDC_REG3_REG_FBK_SEL_MASK; in DCDC_SetInternalRegulatorConfig()
435 base->REG3 = tmp32; in DCDC_SetInternalRegulatorConfig()
504 base->REG3 &= ~(DCDC_REG3_DISABLE_IDLE_SKIP_MASK | DCDC_REG3_DISABLE_PULSE_SKIP_MASK); in DCDC_BootIntoDCM()
505 base->REG3 |= DCDC_REG3_ENABLE_FF_MASK; in DCDC_BootIntoDCM()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_dcdc.h524 … base->REG3 |= DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK | DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnterLowPowerMode()
568 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0StandbyModeTargetVoltage()
600 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P8StandbyModeTargetVoltage()
631 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0BuckModeTargetVoltage()
661 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P8BuckModeTargetVoltage()
696 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
700 base->REG3 |= DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
717 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P8TargetVoltageStepping()
721 base->REG3 |= DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P8TargetVoltageStepping()
897 base->REG3 |= DCDC_REG3_MISC_DELAY_TIMING_MASK; in DCDC_EnableAdjustDelay()
[all …]
Dfsl_dcdc.c413 tmp32 = base->REG3 & ~DCDC_REG3_MINPWR_DC_HALFCLK_MASK; in DCDC_SetMinPowerConfig()
418 base->REG3 = tmp32; in DCDC_SetMinPowerConfig()
433 tmp32 = base->REG3 & ~DCDC_REG3_REG_FBK_SEL_MASK; in DCDC_SetInternalRegulatorConfig()
435 base->REG3 = tmp32; in DCDC_SetInternalRegulatorConfig()
504 base->REG3 &= ~(DCDC_REG3_DISABLE_IDLE_SKIP_MASK | DCDC_REG3_DISABLE_PULSE_SKIP_MASK); in DCDC_BootIntoDCM()
505 base->REG3 |= DCDC_REG3_ENABLE_FF_MASK; in DCDC_BootIntoDCM()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_dcdc.h524 … base->REG3 |= DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK | DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnterLowPowerMode()
568 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0StandbyModeTargetVoltage()
600 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P8StandbyModeTargetVoltage()
631 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0BuckModeTargetVoltage()
661 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P8BuckModeTargetVoltage()
696 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
700 base->REG3 |= DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
717 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P8TargetVoltageStepping()
721 base->REG3 |= DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P8TargetVoltageStepping()
897 base->REG3 |= DCDC_REG3_MISC_DELAY_TIMING_MASK; in DCDC_EnableAdjustDelay()
[all …]
Dfsl_dcdc.c413 tmp32 = base->REG3 & ~DCDC_REG3_MINPWR_DC_HALFCLK_MASK; in DCDC_SetMinPowerConfig()
418 base->REG3 = tmp32; in DCDC_SetMinPowerConfig()
433 tmp32 = base->REG3 & ~DCDC_REG3_REG_FBK_SEL_MASK; in DCDC_SetInternalRegulatorConfig()
435 base->REG3 = tmp32; in DCDC_SetInternalRegulatorConfig()
504 base->REG3 &= ~(DCDC_REG3_DISABLE_IDLE_SKIP_MASK | DCDC_REG3_DISABLE_PULSE_SKIP_MASK); in DCDC_BootIntoDCM()
505 base->REG3 |= DCDC_REG3_ENABLE_FF_MASK; in DCDC_BootIntoDCM()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_dcdc.h524 … base->REG3 |= DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK | DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnterLowPowerMode()
568 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0StandbyModeTargetVoltage()
600 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P8StandbyModeTargetVoltage()
631 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0BuckModeTargetVoltage()
661 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P8BuckModeTargetVoltage()
696 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
700 base->REG3 |= DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
717 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P8TargetVoltageStepping()
721 base->REG3 |= DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P8TargetVoltageStepping()
897 base->REG3 |= DCDC_REG3_MISC_DELAY_TIMING_MASK; in DCDC_EnableAdjustDelay()
[all …]
Dfsl_dcdc.c413 tmp32 = base->REG3 & ~DCDC_REG3_MINPWR_DC_HALFCLK_MASK; in DCDC_SetMinPowerConfig()
418 base->REG3 = tmp32; in DCDC_SetMinPowerConfig()
433 tmp32 = base->REG3 & ~DCDC_REG3_REG_FBK_SEL_MASK; in DCDC_SetInternalRegulatorConfig()
435 base->REG3 = tmp32; in DCDC_SetInternalRegulatorConfig()
504 base->REG3 &= ~(DCDC_REG3_DISABLE_IDLE_SKIP_MASK | DCDC_REG3_DISABLE_PULSE_SKIP_MASK); in DCDC_BootIntoDCM()
505 base->REG3 |= DCDC_REG3_ENABLE_FF_MASK; in DCDC_BootIntoDCM()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_dcdc.h524 … base->REG3 |= DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK | DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnterLowPowerMode()
568 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0StandbyModeTargetVoltage()
600 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P8StandbyModeTargetVoltage()
631 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0BuckModeTargetVoltage()
661 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P8BuckModeTargetVoltage()
696 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
700 base->REG3 |= DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
717 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P8TargetVoltageStepping()
721 base->REG3 |= DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P8TargetVoltageStepping()
897 base->REG3 |= DCDC_REG3_MISC_DELAY_TIMING_MASK; in DCDC_EnableAdjustDelay()
[all …]
Dfsl_dcdc.c413 tmp32 = base->REG3 & ~DCDC_REG3_MINPWR_DC_HALFCLK_MASK; in DCDC_SetMinPowerConfig()
418 base->REG3 = tmp32; in DCDC_SetMinPowerConfig()
433 tmp32 = base->REG3 & ~DCDC_REG3_REG_FBK_SEL_MASK; in DCDC_SetInternalRegulatorConfig()
435 base->REG3 = tmp32; in DCDC_SetInternalRegulatorConfig()
504 base->REG3 &= ~(DCDC_REG3_DISABLE_IDLE_SKIP_MASK | DCDC_REG3_DISABLE_PULSE_SKIP_MASK); in DCDC_BootIntoDCM()
505 base->REG3 |= DCDC_REG3_ENABLE_FF_MASK; in DCDC_BootIntoDCM()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_dcdc.h524 … base->REG3 |= DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK | DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnterLowPowerMode()
568 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0StandbyModeTargetVoltage()
600 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P8StandbyModeTargetVoltage()
631 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0BuckModeTargetVoltage()
661 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P8BuckModeTargetVoltage()
696 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
700 base->REG3 |= DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
717 base->REG3 &= ~DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P8TargetVoltageStepping()
721 base->REG3 |= DCDC_REG3_VDD1P8CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P8TargetVoltageStepping()
897 base->REG3 |= DCDC_REG3_MISC_DELAY_TIMING_MASK; in DCDC_EnableAdjustDelay()
[all …]
Dfsl_dcdc.c413 tmp32 = base->REG3 & ~DCDC_REG3_MINPWR_DC_HALFCLK_MASK; in DCDC_SetMinPowerConfig()
418 base->REG3 = tmp32; in DCDC_SetMinPowerConfig()
433 tmp32 = base->REG3 & ~DCDC_REG3_REG_FBK_SEL_MASK; in DCDC_SetInternalRegulatorConfig()
435 base->REG3 = tmp32; in DCDC_SetInternalRegulatorConfig()
504 base->REG3 &= ~(DCDC_REG3_DISABLE_IDLE_SKIP_MASK | DCDC_REG3_DISABLE_PULSE_SKIP_MASK); in DCDC_BootIntoDCM()
505 base->REG3 |= DCDC_REG3_ENABLE_FF_MASK; in DCDC_BootIntoDCM()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1181/drivers/
Dfsl_dcdc.h335 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0LowPowerModeTargetVoltage()
410 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0BuckModeTargetVoltage()
584 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
588 base->REG3 |= DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
701 base->REG3 |= DCDC_REG3_MISC_DELAY_TIMING_MASK; in DCDC_EnableAdjustDelay()
705 base->REG3 &= ~DCDC_REG3_MISC_DELAY_TIMING_MASK; in DCDC_EnableAdjustDelay()
Dfsl_dcdc.c319 tmp32 = base->REG3 & ~DCDC_REG3_REG_FBK_SEL_MASK; in DCDC_SetInternalRegulatorConfig()
321 base->REG3 = tmp32; in DCDC_SetInternalRegulatorConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/drivers/
Dfsl_dcdc.h335 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0LowPowerModeTargetVoltage()
410 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0BuckModeTargetVoltage()
584 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
588 base->REG3 |= DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
701 base->REG3 |= DCDC_REG3_MISC_DELAY_TIMING_MASK; in DCDC_EnableAdjustDelay()
705 base->REG3 &= ~DCDC_REG3_MISC_DELAY_TIMING_MASK; in DCDC_EnableAdjustDelay()
Dfsl_dcdc.c319 tmp32 = base->REG3 & ~DCDC_REG3_REG_FBK_SEL_MASK; in DCDC_SetInternalRegulatorConfig()
321 base->REG3 = tmp32; in DCDC_SetInternalRegulatorConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1182/drivers/
Dfsl_dcdc.h335 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0LowPowerModeTargetVoltage()
410 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0BuckModeTargetVoltage()
584 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
588 base->REG3 |= DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
701 base->REG3 |= DCDC_REG3_MISC_DELAY_TIMING_MASK; in DCDC_EnableAdjustDelay()
705 base->REG3 &= ~DCDC_REG3_MISC_DELAY_TIMING_MASK; in DCDC_EnableAdjustDelay()
Dfsl_dcdc.c319 tmp32 = base->REG3 & ~DCDC_REG3_REG_FBK_SEL_MASK; in DCDC_SetInternalRegulatorConfig()
321 base->REG3 = tmp32; in DCDC_SetInternalRegulatorConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/drivers/
Dfsl_dcdc.h335 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0LowPowerModeTargetVoltage()
410 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_SetVDD1P0BuckModeTargetVoltage()
584 base->REG3 &= ~DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
588 base->REG3 |= DCDC_REG3_VDD1P0CTRL_DISABLE_STEP_MASK; in DCDC_EnableVDD1P0TargetVoltageStepping()
701 base->REG3 |= DCDC_REG3_MISC_DELAY_TIMING_MASK; in DCDC_EnableAdjustDelay()
705 base->REG3 &= ~DCDC_REG3_MISC_DELAY_TIMING_MASK; in DCDC_EnableAdjustDelay()
Dfsl_dcdc.c319 tmp32 = base->REG3 & ~DCDC_REG3_REG_FBK_SEL_MASK; in DCDC_SetInternalRegulatorConfig()
321 base->REG3 = tmp32; in DCDC_SetInternalRegulatorConfig()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1010/
Dclock_config.c164 DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x12); in BOARD_BootClockRUN()

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