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Searched refs:REG2 (Results 1 – 25 of 55) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_dcdc.c383 … tmp32 = base->REG2 & ~(DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK | DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK | in DCDC_SetLoopControlConfig()
398 base->REG2 = tmp32; in DCDC_SetLoopControlConfig()
503 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoDCM()
520 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoCCM()
Dfsl_dcdc.h918 base->REG2 |= DCDC_REG2_DCM_SET_CTRL_MASK; in DCDC_EnableImproveTransition()
922 base->REG2 &= ~DCDC_REG2_DCM_SET_CTRL_MASK; in DCDC_EnableImproveTransition()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_dcdc.c383 … tmp32 = base->REG2 & ~(DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK | DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK | in DCDC_SetLoopControlConfig()
398 base->REG2 = tmp32; in DCDC_SetLoopControlConfig()
503 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoDCM()
520 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoCCM()
Dfsl_dcdc.h918 base->REG2 |= DCDC_REG2_DCM_SET_CTRL_MASK; in DCDC_EnableImproveTransition()
922 base->REG2 &= ~DCDC_REG2_DCM_SET_CTRL_MASK; in DCDC_EnableImproveTransition()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_dcdc.c383 … tmp32 = base->REG2 & ~(DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK | DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK | in DCDC_SetLoopControlConfig()
398 base->REG2 = tmp32; in DCDC_SetLoopControlConfig()
503 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoDCM()
520 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoCCM()
Dfsl_dcdc.h918 base->REG2 |= DCDC_REG2_DCM_SET_CTRL_MASK; in DCDC_EnableImproveTransition()
922 base->REG2 &= ~DCDC_REG2_DCM_SET_CTRL_MASK; in DCDC_EnableImproveTransition()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_dcdc.c383 … tmp32 = base->REG2 & ~(DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK | DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK | in DCDC_SetLoopControlConfig()
398 base->REG2 = tmp32; in DCDC_SetLoopControlConfig()
503 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoDCM()
520 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoCCM()
Dfsl_dcdc.h918 base->REG2 |= DCDC_REG2_DCM_SET_CTRL_MASK; in DCDC_EnableImproveTransition()
922 base->REG2 &= ~DCDC_REG2_DCM_SET_CTRL_MASK; in DCDC_EnableImproveTransition()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_dcdc.c383 … tmp32 = base->REG2 & ~(DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK | DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK | in DCDC_SetLoopControlConfig()
398 base->REG2 = tmp32; in DCDC_SetLoopControlConfig()
503 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoDCM()
520 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoCCM()
Dfsl_dcdc.h918 base->REG2 |= DCDC_REG2_DCM_SET_CTRL_MASK; in DCDC_EnableImproveTransition()
922 base->REG2 &= ~DCDC_REG2_DCM_SET_CTRL_MASK; in DCDC_EnableImproveTransition()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_dcdc.c383 … tmp32 = base->REG2 & ~(DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK | DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK | in DCDC_SetLoopControlConfig()
398 base->REG2 = tmp32; in DCDC_SetLoopControlConfig()
503 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoDCM()
520 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoCCM()
Dfsl_dcdc.h918 base->REG2 |= DCDC_REG2_DCM_SET_CTRL_MASK; in DCDC_EnableImproveTransition()
922 base->REG2 &= ~DCDC_REG2_DCM_SET_CTRL_MASK; in DCDC_EnableImproveTransition()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_dcdc.c383 … tmp32 = base->REG2 & ~(DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK | DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK | in DCDC_SetLoopControlConfig()
398 base->REG2 = tmp32; in DCDC_SetLoopControlConfig()
503 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoDCM()
520 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoCCM()
Dfsl_dcdc.h918 base->REG2 |= DCDC_REG2_DCM_SET_CTRL_MASK; in DCDC_EnableImproveTransition()
922 base->REG2 &= ~DCDC_REG2_DCM_SET_CTRL_MASK; in DCDC_EnableImproveTransition()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1181/drivers/
Dfsl_dcdc.c289 … tmp32 = base->REG2 & ~(DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK | DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK | in DCDC_SetLoopControlConfig()
304 base->REG2 = tmp32; in DCDC_SetLoopControlConfig()
335 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoCCM()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/drivers/
Dfsl_dcdc.c289 … tmp32 = base->REG2 & ~(DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK | DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK | in DCDC_SetLoopControlConfig()
304 base->REG2 = tmp32; in DCDC_SetLoopControlConfig()
335 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoCCM()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1182/drivers/
Dfsl_dcdc.c289 … tmp32 = base->REG2 & ~(DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK | DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK | in DCDC_SetLoopControlConfig()
304 base->REG2 = tmp32; in DCDC_SetLoopControlConfig()
335 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoCCM()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/drivers/
Dfsl_dcdc.c289 … tmp32 = base->REG2 & ~(DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK | DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK | in DCDC_SetLoopControlConfig()
304 base->REG2 = tmp32; in DCDC_SetLoopControlConfig()
335 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoCCM()
/hal_nxp-latest/mcux/mcux-sdk/drivers/dcdc_1/
Dfsl_dcdc.c514 … tmp32 = base->REG2 & ~(DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK | DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK | in DCDC_SetLoopControlConfig()
526 base->REG2 = tmp32; in DCDC_SetLoopControlConfig()
896 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoDCM()
912 …base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x… in DCDC_BootIntoCCM()
Dfsl_dcdc.h658 base->REG2 |= DCDC_REG2_DCM_SET_CTRL_MASK; in DCDC_EnableImproveTransition()
662 base->REG2 &= ~DCDC_REG2_DCM_SET_CTRL_MASK; in DCDC_EnableImproveTransition()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW30Z4/
DMKW30Z4.h1298 __IO uint32_t REG2; /**< DCDC REGISTER 2, offset: 0x8 */ member
1319 #define DCDC_REG2_REG(base) ((base)->REG2)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW20Z4/
DMKW20Z4.h1298 __IO uint32_t REG2; /**< DCDC REGISTER 2, offset: 0x8 */ member
1319 #define DCDC_REG2_REG(base) ((base)->REG2)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW40Z4/
DMKW40Z4.h1298 __IO uint32_t REG2; /**< DCDC REGISTER 2, offset: 0x8 */ member
1319 #define DCDC_REG2_REG(base) ((base)->REG2)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW31Z4/
DMKW31Z4.h1373 __IO uint32_t REG2; /**< DCDC REGISTER 2, offset: 0x8 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW21Z4/
DMKW21Z4.h1302 __IO uint32_t REG2; /**< DCDC REGISTER 2, offset: 0x8 */ member

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