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Searched refs:RCM_RPC_RSTFLTSEL_MASK (Results 1 – 24 of 24) sorted by relevance

/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K148_RCM.h274 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
277 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
DS32K118_RCM.h269 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
272 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
DS32K116_RCM.h269 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
272 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
DS32K142W_RCM.h274 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
277 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
DS32K142_RCM.h274 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
277 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
DS32K146_RCM.h274 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
277 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
DS32K144_RCM.h274 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
277 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
DS32K144W_RCM.h274 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
277 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h8798 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
8802 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h8800 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
8804 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h9637 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
9641 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h11736 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
11740 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h11522 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
11525 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h11742 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
11746 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h11739 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
11743 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h11578 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
11582 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/
DMKE17Z9.h11526 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
11529 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h11581 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
11585 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h11524 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
11527 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h14592 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
14596 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h13691 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
13694 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h13691 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
13694 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h15598 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
15602 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h15592 #define RCM_RPC_RSTFLTSEL_MASK (0x1F00U) macro
15596 … (((uint32_t)(((uint32_t)(x)) << RCM_RPC_RSTFLTSEL_SHIFT)) & RCM_RPC_RSTFLTSEL_MASK)