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Searched refs:RBSR (Results 1 – 25 of 50) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/xspi/
Dfsl_xspi.h1476 return ((base->RBSR & XSPI_RBSR_RDBFL_MASK) >> XSPI_RBSR_RDBFL_SHIFT) * 4UL; in XSPI_GetRxBufferAvailableBytesCount()
1488 return ((base->RBSR & XSPI_RBSR_RDCTR_MASK) >> XSPI_RBSR_RDCTR_SHIFT) * 4UL; in XSPI_GetRxBufferRemovedBytesCount()
/hal_nxp-latest/mcux/mcux-sdk/drivers/qspi/
Dfsl_qspi.c548 temp = (base->RBSR & QuadSPI_RBSR_RDBFL_MASK) >> QuadSPI_RBSR_RDBFL_SHIFT; in QSPI_ReadBlocking()
/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K148_QUADSPI.h95 __I uint32_t RBSR; /**< RX Buffer Status Register, offset: 0x10C */ member
/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_QUADSPI.h97 __I uint32_t RBSR; /**< RX Buffer Status Register, offset: 0x10C */ member
/hal_nxp-latest/s32/drivers/s32k3/Fls/include/
DQspi_Ip_HwAccess.h724 uint32 RegValue = (uint32)BaseAddr->RBSR; in Qspi_Ip_GetRxBufFill()
/hal_nxp-latest/s32/drivers/s32ze/Mem_EXFLS/include/
DQspi_Ip_HwAccess.h1042 uint32 RegValue = (uint32)BaseAddr->RBSR; in Qspi_Ip_GetRxBufFill()
/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_NETC_F3_SI5.h226 …__IO uint32_t RBSR; /**< Rx BDR 0 status register..Rx BDR 17 status r… member
DS32Z2_NETC_F3_SI6.h226 …__IO uint32_t RBSR; /**< Rx BDR 0 status register..Rx BDR 17 status r… member
DS32Z2_NETC_F3_SI7.h226 …__IO uint32_t RBSR; /**< Rx BDR 0 status register..Rx BDR 17 status r… member
DS32Z2_NETC_F3_SI4.h226 …__IO uint32_t RBSR; /**< Rx BDR 0 status register..Rx BDR 17 status r… member
DS32Z2_QUADSPI.h104 __I uint32_t RBSR; /**< RX Buffer Status Register, offset: 0x10C */ member
DS32Z2_NETC_F3_SI1.h226 …__IO uint32_t RBSR; /**< Rx BDR 0 status register..Rx BDR 17 status r… member
DS32Z2_NETC_F3_SI2.h226 …__IO uint32_t RBSR; /**< Rx BDR 0 status register..Rx BDR 17 status r… member
DS32Z2_NETC_F3_SI3.h226 …__IO uint32_t RBSR; /**< Rx BDR 0 status register..Rx BDR 17 status r… member
DS32Z2_NETC_F3_SI0.h228 …__IO uint32_t RBSR; /**< Rx BDR 0 status register..Rx BDR 17 status r… member
/hal_nxp-latest/s32/drivers/s32ze/Eth_NETC/src/
DNetc_Eth_Ip.c5499 sbStatus= netcSIsBase[siIndex]->BDR_NUM[idx].RBSR;
5503 netcSIsBase[siIndex]->BDR_NUM[idx].RBSR = sbStatus;
/hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h18273 __I uint32_t RBSR; /**< RX Buffer Status Register, offset: 0x10C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h19246 __I uint32_t RBSR; /**< RX Buffer Status Register, offset: 0x10C */ member
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h30431 …__I uint32_t RBSR; /**< RX Buffer Status Register, offset: 0x1… member
30479 #define QuadSPI_RBSR_REG(base) ((base)->RBSR)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h17777 __I uint32_t RBSR; /**< RX Buffer Status Register, offset: 0x10C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h17775 __I uint32_t RBSR; /**< RX Buffer Status Register, offset: 0x10C */ member
/hal_nxp-latest/imx/devices/MCIMX7D/
DMCIMX7D_M4.h37629 …__I uint32_t RBSR; /**< RX Buffer Status Register, offset: 0x1… member
37677 #define QuadSPI_RBSR_REG(base) ((base)->RBSR)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h27222 __I uint32_t RBSR; /**< RX Buffer Status Register, offset: 0x10C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h27223 __I uint32_t RBSR; /**< RX Buffer Status Register, offset: 0x10C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h63483 __I uint32_t RBSR; /**< RX Buffer Status, offset: 0x10C */ member

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