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Searched refs:RAMCLKSEL_OFFSET (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_clock.h801 #define RAMCLKSEL_OFFSET 0x450 macro
1029 …kCOMMON_VDD2_BASE_to_RAM = CLKCTL0_TUPLE_MUXA(RAMCLKSEL_OFFSET, 0), /*!< Attach baseclk_com2 clock…
1030 …kMAIN_PLL_PFD0_to_RAM = CLKCTL0_TUPLE_MUXA(RAMCLKSEL_OFFSET, 1), /*!< Attach Main PLL PFD0 to R…
1031 …kFRO0_DIV1_to_RAM = CLKCTL0_TUPLE_MUXA(RAMCLKSEL_OFFSET, 2), /*!< Attach FRO0 Max to RAM Cl…
1032 …kFRO1_DIV1_to_RAM = CLKCTL0_TUPLE_MUXA(RAMCLKSEL_OFFSET, 3), /*!< Attach FRO1 Max to RAM Cl…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_clock.h801 #define RAMCLKSEL_OFFSET 0x450 macro
1029 …kCOMMON_VDD2_BASE_to_RAM = CLKCTL0_TUPLE_MUXA(RAMCLKSEL_OFFSET, 0), /*!< Attach baseclk_com2 clock…
1030 …kMAIN_PLL_PFD0_to_RAM = CLKCTL0_TUPLE_MUXA(RAMCLKSEL_OFFSET, 1), /*!< Attach Main PLL PFD0 to R…
1031 …kFRO0_DIV1_to_RAM = CLKCTL0_TUPLE_MUXA(RAMCLKSEL_OFFSET, 2), /*!< Attach FRO0 Max to RAM Cl…
1032 …kFRO1_DIV1_to_RAM = CLKCTL0_TUPLE_MUXA(RAMCLKSEL_OFFSET, 3), /*!< Attach FRO1 Max to RAM Cl…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_clock.h801 #define RAMCLKSEL_OFFSET 0x450 macro
1029 …kCOMMON_VDD2_BASE_to_RAM = CLKCTL0_TUPLE_MUXA(RAMCLKSEL_OFFSET, 0), /*!< Attach baseclk_com2 clock…
1030 …kMAIN_PLL_PFD0_to_RAM = CLKCTL0_TUPLE_MUXA(RAMCLKSEL_OFFSET, 1), /*!< Attach Main PLL PFD0 to R…
1031 …kFRO0_DIV1_to_RAM = CLKCTL0_TUPLE_MUXA(RAMCLKSEL_OFFSET, 2), /*!< Attach FRO0 Max to RAM Cl…
1032 …kFRO1_DIV1_to_RAM = CLKCTL0_TUPLE_MUXA(RAMCLKSEL_OFFSET, 3), /*!< Attach FRO1 Max to RAM Cl…