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Searched refs:QuadSPI_TGIPCRS_CLR_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_QUADSPI.h1498 #define QuadSPI_TGIPCRS_CLR_MASK (0x10000000U) macro
1501 … (((uint32_t)(((uint32_t)(x)) << QuadSPI_TGIPCRS_CLR_SHIFT)) & QuadSPI_TGIPCRS_CLR_MASK)
/hal_nxp-latest/s32/drivers/s32k3/Fls/src/
DQspi_Ip_Controller.c1134 BaseAddr->MDAD[Mdad].TGIPCRS |= QuadSPI_TGIPCRS_CLR_MASK; in Qspi_Ip_Sfp_ClearLatchedErrors_Privileged()
/hal_nxp-latest/s32/drivers/s32ze/Mem_EXFLS/src/
DQspi_Ip_Controller.c1365 BaseAddr->MDAD[Mdad].TGIPCRS |= QuadSPI_TGIPCRS_CLR_MASK; in Qspi_Ip_Sfp_ClearLatchedErrors_Privileged()