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Searched refs:QuadSPI_MGC_GVLD_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_QUADSPI.h1537 #define QuadSPI_MGC_GVLD_MASK (0x80000000U) macro
1540 … (((uint32_t)(((uint32_t)(x)) << QuadSPI_MGC_GVLD_SHIFT)) & QuadSPI_MGC_GVLD_MASK)
/hal_nxp-latest/s32/drivers/s32k3/Fls/include/
DQspi_Ip_HwAccess.h1044 RegValue &= ~QuadSPI_MGC_GVLD_MASK; in Qspi_Ip_Sfp_SetAccessControls()
/hal_nxp-latest/s32/drivers/s32ze/Mem_EXFLS/include/
DQspi_Ip_HwAccess.h1458 RegValue &= ~QuadSPI_MGC_GVLD_MASK; in Qspi_Ip_Sfp_SetAccessControls()