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Searched refs:QuadSPI_BUF0CR_REG (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h30469 #define QuadSPI_BUF0CR_REG(base) ((base)->BUF0CR) macro
30838 #define QuadSPI1_BUF0CR QuadSPI_BUF0CR_REG(QuadSPI1_BASE_PTR)
30963 #define QuadSPI2_BUF0CR QuadSPI_BUF0CR_REG(QuadSPI2_BASE_PTR)
/hal_nxp-latest/imx/devices/MCIMX7D/
DMCIMX7D_M4.h37667 #define QuadSPI_BUF0CR_REG(base) ((base)->BUF0CR) macro
38033 #define QuadSPI1_BUF0CR QuadSPI_BUF0CR_REG(QuadSPI1_BASE_PTR)
38158 #define QuadSPI2_BUF0CR QuadSPI_BUF0CR_REG(QuadSPI2_BASE_PTR)