1 /* 2 * Copyright 1997-2016 Freescale Semiconductor, Inc. 3 * Copyright 2016-2024 NXP 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 /*! 9 * @file S32Z2_PROGRAM_MEMORY_SUBSYSTEM.h 10 * @version 2.3 11 * @date 2024-05-03 12 * @brief Peripheral Access Layer for S32Z2_PROGRAM_MEMORY_SUBSYSTEM 13 * 14 * This file contains register definitions and macros for easy access to their 15 * bit fields. 16 * 17 * This file assumes LITTLE endian system. 18 */ 19 20 /** 21 * @page misra_violations MISRA-C:2012 violations 22 * 23 * @section [global] 24 * Violates MISRA 2012 Advisory Rule 2.3, local typedef not referenced 25 * The SoC header defines typedef for all modules. 26 * 27 * @section [global] 28 * Violates MISRA 2012 Advisory Rule 2.5, local macro not referenced 29 * The SoC header defines macros for all modules and registers. 30 * 31 * @section [global] 32 * Violates MISRA 2012 Advisory Directive 4.9, Function-like macro 33 * These are generated macros used for accessing the bit-fields from registers. 34 * 35 * @section [global] 36 * Violates MISRA 2012 Required Rule 5.1, identifier clash 37 * The supported compilers use more than 31 significant characters for identifiers. 38 * 39 * @section [global] 40 * Violates MISRA 2012 Required Rule 5.2, identifier clash 41 * The supported compilers use more than 31 significant characters for identifiers. 42 * 43 * @section [global] 44 * Violates MISRA 2012 Required Rule 5.4, identifier clash 45 * The supported compilers use more than 31 significant characters for identifiers. 46 * 47 * @section [global] 48 * Violates MISRA 2012 Required Rule 5.5, identifier clash 49 * The supported compilers use more than 31 significant characters for identifiers. 50 * 51 * @section [global] 52 * Violates MISRA 2012 Required Rule 21.1, defined macro '__I' is reserved to the compiler 53 * This type qualifier is needed to ensure correct I/O access and addressing. 54 */ 55 56 /* Prevention from multiple including the same memory map */ 57 #if !defined(S32Z2_PROGRAM_MEMORY_SUBSYSTEM_H_) /* Check if memory map has not been already included */ 58 #define S32Z2_PROGRAM_MEMORY_SUBSYSTEM_H_ 59 60 #include "S32Z2_COMMON.h" 61 62 /* ---------------------------------------------------------------------------- 63 -- PROGRAM_MEMORY_SUBSYSTEM Peripheral Access Layer 64 ---------------------------------------------------------------------------- */ 65 66 /*! 67 * @addtogroup PROGRAM_MEMORY_SUBSYSTEM_Peripheral_Access_Layer PROGRAM_MEMORY_SUBSYSTEM Peripheral Access Layer 68 * @{ 69 */ 70 71 /** PROGRAM_MEMORY_SUBSYSTEM - Register Layout Typedef */ 72 typedef struct { 73 __IO uint32_t MSS_PCR; /**< Program Control, offset: 0x0 */ 74 __IO uint32_t P_SYS_OU_C; /**< PMSS AXI Outstanding Configuration, offset: 0x4 */ 75 __I uint32_t P_HDCFG; /**< PMSS Hardware Configuration, offset: 0x8 */ 76 uint8_t RESERVED_0[16]; 77 __IO uint32_t P_PORT_ID; /**< Program Port AXI ID, offset: 0x1C */ 78 __I uint32_t P_ADD0_START; /**< PMSS ADD0 START, offset: 0x20 */ 79 __IO uint32_t P_ADD0_ATT0; /**< PMSS ADD0 ATT0, offset: 0x24 */ 80 __IO uint32_t P_ADD1_START; /**< PMSS ADD1 START, offset: 0x28 */ 81 __IO uint32_t P_ADD1_ATT0; /**< PMSS ADD1 ATT0, offset: 0x2C */ 82 __IO uint32_t P_ADD2_START; /**< PMSS ADD2 START, offset: 0x30 */ 83 __IO uint32_t P_ADD2_ATT0; /**< PMSS ADD2 ATT0, offset: 0x34 */ 84 __IO uint32_t P_ADD3_START; /**< PMSS ADD3 START, offset: 0x38 */ 85 __IO uint32_t P_ADD3_ATT0; /**< PMSS ADD3 ATT0, offset: 0x3C */ 86 __IO uint32_t P_ADD4_START; /**< PMSS ADD4 START, offset: 0x40 */ 87 __IO uint32_t P_ADD4_ATT0; /**< PMSS ADD4 ATT0, offset: 0x44 */ 88 __IO uint32_t P_ADD5_START; /**< PMSS ADD5 START, offset: 0x48 */ 89 __IO uint32_t P_ADD5_ATT0; /**< PMSS ADD5 ATT0, offset: 0x4C */ 90 __IO uint32_t P_ADD6_START; /**< PMSS ADD6 START, offset: 0x50 */ 91 __IO uint32_t P_ADD6_ATT0; /**< PMSS ADD6 ATT0, offset: 0x54 */ 92 __IO uint32_t P_ADD7_START; /**< PMSS ADD7 START, offset: 0x58 */ 93 __IO uint32_t P_ADD7_ATT0; /**< PMSS ADD7 ATT0, offset: 0x5C */ 94 uint8_t RESERVED_1[128]; 95 __IO uint32_t P_CCOSAR; /**< Program Cache Software Operations, offset: 0xE0 */ 96 __IO uint32_t P_CCOCR; /**< Program Cache Software Operations Control, offset: 0xE4 */ 97 uint8_t RESERVED_2[8]; 98 __I uint32_t P_ECADD; /**< Program ECC Error Address, offset: 0xF0 */ 99 uint8_t RESERVED_3[76]; 100 __O uint32_t PMSSACS; /**< PMSS Access Control, offset: 0x140 */ 101 } PROGRAM_MEMORY_SUBSYSTEM_Type, *PROGRAM_MEMORY_SUBSYSTEM_MemMapPtr; 102 103 /** Number of instances of the PROGRAM_MEMORY_SUBSYSTEM module. */ 104 #define PROGRAM_MEMORY_SUBSYSTEM_INSTANCE_COUNT (1u) 105 106 /* PROGRAM_MEMORY_SUBSYSTEM - Peripheral instance base addresses */ 107 /** Peripheral CEVA_SPF2__PROGRAM_MEMORY_SUBSYSTEM base address */ 108 #define IP_CEVA_SPF2__PROGRAM_MEMORY_SUBSYSTEM_BASE (0x24400400u) 109 /** Peripheral CEVA_SPF2__PROGRAM_MEMORY_SUBSYSTEM base pointer */ 110 #define IP_CEVA_SPF2__PROGRAM_MEMORY_SUBSYSTEM ((PROGRAM_MEMORY_SUBSYSTEM_Type *)IP_CEVA_SPF2__PROGRAM_MEMORY_SUBSYSTEM_BASE) 111 /** Array initializer of PROGRAM_MEMORY_SUBSYSTEM peripheral base addresses */ 112 #define IP_PROGRAM_MEMORY_SUBSYSTEM_BASE_ADDRS { IP_CEVA_SPF2__PROGRAM_MEMORY_SUBSYSTEM_BASE } 113 /** Array initializer of PROGRAM_MEMORY_SUBSYSTEM peripheral base pointers */ 114 #define IP_PROGRAM_MEMORY_SUBSYSTEM_BASE_PTRS { IP_CEVA_SPF2__PROGRAM_MEMORY_SUBSYSTEM } 115 116 /* ---------------------------------------------------------------------------- 117 -- PROGRAM_MEMORY_SUBSYSTEM Register Masks 118 ---------------------------------------------------------------------------- */ 119 120 /*! 121 * @addtogroup PROGRAM_MEMORY_SUBSYSTEM_Register_Masks PROGRAM_MEMORY_SUBSYSTEM Register Masks 122 * @{ 123 */ 124 125 /*! @name MSS_PCR - Program Control */ 126 /*! @{ */ 127 128 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_PAPE_MASK (0x1U) 129 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_PAPE_SHIFT (0U) 130 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_PAPE_WIDTH (1U) 131 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_PAPE(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_PAPE_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_PAPE_MASK) 132 133 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_CAC_PFE_MASK (0x4U) 134 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_CAC_PFE_SHIFT (2U) 135 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_CAC_PFE_WIDTH (1U) 136 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_CAC_PFE(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_CAC_PFE_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_CAC_PFE_MASK) 137 138 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_CLBE_MASK (0x40U) 139 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_CLBE_SHIFT (6U) 140 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_CLBE_WIDTH (1U) 141 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_CLBE(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_CLBE_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_CLBE_MASK) 142 143 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_PCAC_EN_MASK (0x80U) 144 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_PCAC_EN_SHIFT (7U) 145 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_PCAC_EN_WIDTH (1U) 146 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_PCAC_EN(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_PCAC_EN_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_PCAC_EN_MASK) 147 148 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_HWPF_SZ_MASK (0x300U) 149 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_HWPF_SZ_SHIFT (8U) 150 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_HWPF_SZ_WIDTH (2U) 151 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_HWPF_SZ(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_HWPF_SZ_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_HWPF_SZ_MASK) 152 153 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_CAC_WPE_MASK (0x1000U) 154 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_CAC_WPE_SHIFT (12U) 155 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_CAC_WPE_WIDTH (1U) 156 #define PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_CAC_WPE(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_CAC_WPE_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_MSS_PCR_CAC_WPE_MASK) 157 /*! @} */ 158 159 /*! @name P_SYS_OU_C - PMSS AXI Outstanding Configuration */ 160 /*! @{ */ 161 162 #define PROGRAM_MEMORY_SUBSYSTEM_P_SYS_OU_C_TOTAL_OS_MASK (0xFU) 163 #define PROGRAM_MEMORY_SUBSYSTEM_P_SYS_OU_C_TOTAL_OS_SHIFT (0U) 164 #define PROGRAM_MEMORY_SUBSYSTEM_P_SYS_OU_C_TOTAL_OS_WIDTH (4U) 165 #define PROGRAM_MEMORY_SUBSYSTEM_P_SYS_OU_C_TOTAL_OS(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_SYS_OU_C_TOTAL_OS_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_SYS_OU_C_TOTAL_OS_MASK) 166 167 #define PROGRAM_MEMORY_SUBSYSTEM_P_SYS_OU_C_SW_OS_MASK (0xF00U) 168 #define PROGRAM_MEMORY_SUBSYSTEM_P_SYS_OU_C_SW_OS_SHIFT (8U) 169 #define PROGRAM_MEMORY_SUBSYSTEM_P_SYS_OU_C_SW_OS_WIDTH (4U) 170 #define PROGRAM_MEMORY_SUBSYSTEM_P_SYS_OU_C_SW_OS(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_SYS_OU_C_SW_OS_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_SYS_OU_C_SW_OS_MASK) 171 /*! @} */ 172 173 /*! @name P_HDCFG - PMSS Hardware Configuration */ 174 /*! @{ */ 175 176 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_PTCM_SZE_MASK (0x7U) 177 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_PTCM_SZE_SHIFT (0U) 178 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_PTCM_SZE_WIDTH (3U) 179 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_PTCM_SZE(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_PTCM_SZE_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_PTCM_SZE_MASK) 180 181 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_PCAC_SZE_MASK (0x70U) 182 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_PCAC_SZE_SHIFT (4U) 183 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_PCAC_SZE_WIDTH (3U) 184 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_PCAC_SZE(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_PCAC_SZE_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_PCAC_SZE_MASK) 185 186 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_PECC_MASK (0x100U) 187 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_PECC_SHIFT (8U) 188 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_PECC_WIDTH (1U) 189 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_PECC(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_PECC_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_PECC_MASK) 190 191 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_EPP_AXI_WID_MASK (0x200U) 192 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_EPP_AXI_WID_SHIFT (9U) 193 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_EPP_AXI_WID_WIDTH (1U) 194 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_EPP_AXI_WID(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_EPP_AXI_WID_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_EPP_AXI_WID_MASK) 195 196 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_L1ICA_MASK (0xC0000000U) 197 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_L1ICA_SHIFT (30U) 198 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_L1ICA_WIDTH (2U) 199 #define PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_L1ICA(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_L1ICA_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_HDCFG_L1ICA_MASK) 200 /*! @} */ 201 202 /*! @name P_PORT_ID - Program Port AXI ID */ 203 /*! @{ */ 204 205 #define PROGRAM_MEMORY_SUBSYSTEM_P_PORT_ID_PDMA_ID_MASK (0xFU) 206 #define PROGRAM_MEMORY_SUBSYSTEM_P_PORT_ID_PDMA_ID_SHIFT (0U) 207 #define PROGRAM_MEMORY_SUBSYSTEM_P_PORT_ID_PDMA_ID_WIDTH (4U) 208 #define PROGRAM_MEMORY_SUBSYSTEM_P_PORT_ID_PDMA_ID(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_PORT_ID_PDMA_ID_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_PORT_ID_PDMA_ID_MASK) 209 210 #define PROGRAM_MEMORY_SUBSYSTEM_P_PORT_ID_PF_ID_MASK (0xF0U) 211 #define PROGRAM_MEMORY_SUBSYSTEM_P_PORT_ID_PF_ID_SHIFT (4U) 212 #define PROGRAM_MEMORY_SUBSYSTEM_P_PORT_ID_PF_ID_WIDTH (4U) 213 #define PROGRAM_MEMORY_SUBSYSTEM_P_PORT_ID_PF_ID(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_PORT_ID_PF_ID_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_PORT_ID_PF_ID_MASK) 214 215 #define PROGRAM_MEMORY_SUBSYSTEM_P_PORT_ID_OCEM_ID_MASK (0xF00U) 216 #define PROGRAM_MEMORY_SUBSYSTEM_P_PORT_ID_OCEM_ID_SHIFT (8U) 217 #define PROGRAM_MEMORY_SUBSYSTEM_P_PORT_ID_OCEM_ID_WIDTH (4U) 218 #define PROGRAM_MEMORY_SUBSYSTEM_P_PORT_ID_OCEM_ID(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_PORT_ID_OCEM_ID_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_PORT_ID_OCEM_ID_MASK) 219 /*! @} */ 220 221 /*! @name P_ADD0_START - PMSS ADD0 START */ 222 /*! @{ */ 223 224 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_START_P_REGION_START_MASK (0xFFFFFU) 225 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_START_P_REGION_START_SHIFT (0U) 226 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_START_P_REGION_START_WIDTH (20U) 227 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_START_P_REGION_START(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_START_P_REGION_START_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_START_P_REGION_START_MASK) 228 229 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_START_INACTIVE_MASK (0x10000000U) 230 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_START_INACTIVE_SHIFT (28U) 231 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_START_INACTIVE_WIDTH (1U) 232 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_START_INACTIVE(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_START_INACTIVE_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_START_INACTIVE_MASK) 233 /*! @} */ 234 235 /*! @name P_ADD0_ATT0 - PMSS ADD0 ATT0 */ 236 /*! @{ */ 237 238 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_L1IC_MASK (0x1U) 239 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_L1IC_SHIFT (0U) 240 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_L1IC_WIDTH (1U) 241 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_L1IC(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_L1IC_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_L1IC_MASK) 242 243 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_L1IC_LOCK_MASK (0x2U) 244 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_L1IC_LOCK_SHIFT (1U) 245 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_L1IC_LOCK_WIDTH (1U) 246 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_L1IC_LOCK(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_L1IC_LOCK_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_L1IC_LOCK_MASK) 247 248 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_P_AP_MASK (0x30U) 249 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_P_AP_SHIFT (4U) 250 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_P_AP_WIDTH (2U) 251 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_P_AP(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_P_AP_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_P_AP_MASK) 252 253 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_P_L2A_MASK (0xF00U) 254 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_P_L2A_SHIFT (8U) 255 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_P_L2A_WIDTH (4U) 256 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_P_L2A(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_P_L2A_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_P_L2A_MASK) 257 258 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_P_RQOS_MASK (0xF000000U) 259 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_P_RQOS_SHIFT (24U) 260 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_P_RQOS_WIDTH (4U) 261 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_P_RQOS(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_P_RQOS_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD0_ATT0_P_RQOS_MASK) 262 /*! @} */ 263 264 /*! @name P_ADD1_START - PMSS ADD1 START */ 265 /*! @{ */ 266 267 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_START_P_REGION_START_MASK (0xFFFFFU) 268 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_START_P_REGION_START_SHIFT (0U) 269 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_START_P_REGION_START_WIDTH (20U) 270 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_START_P_REGION_START(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_START_P_REGION_START_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_START_P_REGION_START_MASK) 271 272 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_START_INACTIVE_MASK (0x10000000U) 273 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_START_INACTIVE_SHIFT (28U) 274 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_START_INACTIVE_WIDTH (1U) 275 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_START_INACTIVE(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_START_INACTIVE_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_START_INACTIVE_MASK) 276 /*! @} */ 277 278 /*! @name P_ADD1_ATT0 - PMSS ADD1 ATT0 */ 279 /*! @{ */ 280 281 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_L1IC_MASK (0x1U) 282 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_L1IC_SHIFT (0U) 283 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_L1IC_WIDTH (1U) 284 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_L1IC(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_L1IC_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_L1IC_MASK) 285 286 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_L1IC_LOCK_MASK (0x2U) 287 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_L1IC_LOCK_SHIFT (1U) 288 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_L1IC_LOCK_WIDTH (1U) 289 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_L1IC_LOCK(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_L1IC_LOCK_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_L1IC_LOCK_MASK) 290 291 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_P_AP_MASK (0x30U) 292 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_P_AP_SHIFT (4U) 293 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_P_AP_WIDTH (2U) 294 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_P_AP(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_P_AP_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_P_AP_MASK) 295 296 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_P_L2A_MASK (0xF00U) 297 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_P_L2A_SHIFT (8U) 298 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_P_L2A_WIDTH (4U) 299 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_P_L2A(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_P_L2A_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_P_L2A_MASK) 300 301 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_P_RQOS_MASK (0xF000000U) 302 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_P_RQOS_SHIFT (24U) 303 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_P_RQOS_WIDTH (4U) 304 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_P_RQOS(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_P_RQOS_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD1_ATT0_P_RQOS_MASK) 305 /*! @} */ 306 307 /*! @name P_ADD2_START - PMSS ADD2 START */ 308 /*! @{ */ 309 310 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_START_P_REGION_START_MASK (0xFFFFFU) 311 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_START_P_REGION_START_SHIFT (0U) 312 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_START_P_REGION_START_WIDTH (20U) 313 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_START_P_REGION_START(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_START_P_REGION_START_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_START_P_REGION_START_MASK) 314 315 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_START_INACTIVE_MASK (0x10000000U) 316 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_START_INACTIVE_SHIFT (28U) 317 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_START_INACTIVE_WIDTH (1U) 318 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_START_INACTIVE(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_START_INACTIVE_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_START_INACTIVE_MASK) 319 /*! @} */ 320 321 /*! @name P_ADD2_ATT0 - PMSS ADD2 ATT0 */ 322 /*! @{ */ 323 324 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_L1IC_MASK (0x1U) 325 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_L1IC_SHIFT (0U) 326 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_L1IC_WIDTH (1U) 327 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_L1IC(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_L1IC_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_L1IC_MASK) 328 329 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_L1IC_LOCK_MASK (0x2U) 330 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_L1IC_LOCK_SHIFT (1U) 331 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_L1IC_LOCK_WIDTH (1U) 332 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_L1IC_LOCK(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_L1IC_LOCK_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_L1IC_LOCK_MASK) 333 334 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_P_AP_MASK (0x30U) 335 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_P_AP_SHIFT (4U) 336 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_P_AP_WIDTH (2U) 337 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_P_AP(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_P_AP_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_P_AP_MASK) 338 339 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_P_L2A_MASK (0xF00U) 340 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_P_L2A_SHIFT (8U) 341 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_P_L2A_WIDTH (4U) 342 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_P_L2A(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_P_L2A_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_P_L2A_MASK) 343 344 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_P_RQOS_MASK (0xF000000U) 345 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_P_RQOS_SHIFT (24U) 346 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_P_RQOS_WIDTH (4U) 347 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_P_RQOS(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_P_RQOS_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD2_ATT0_P_RQOS_MASK) 348 /*! @} */ 349 350 /*! @name P_ADD3_START - PMSS ADD3 START */ 351 /*! @{ */ 352 353 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_START_P_REGION_START_MASK (0xFFFFFU) 354 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_START_P_REGION_START_SHIFT (0U) 355 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_START_P_REGION_START_WIDTH (20U) 356 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_START_P_REGION_START(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_START_P_REGION_START_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_START_P_REGION_START_MASK) 357 358 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_START_INACTIVE_MASK (0x10000000U) 359 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_START_INACTIVE_SHIFT (28U) 360 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_START_INACTIVE_WIDTH (1U) 361 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_START_INACTIVE(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_START_INACTIVE_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_START_INACTIVE_MASK) 362 /*! @} */ 363 364 /*! @name P_ADD3_ATT0 - PMSS ADD3 ATT0 */ 365 /*! @{ */ 366 367 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_L1IC_MASK (0x1U) 368 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_L1IC_SHIFT (0U) 369 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_L1IC_WIDTH (1U) 370 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_L1IC(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_L1IC_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_L1IC_MASK) 371 372 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_L1IC_LOCK_MASK (0x2U) 373 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_L1IC_LOCK_SHIFT (1U) 374 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_L1IC_LOCK_WIDTH (1U) 375 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_L1IC_LOCK(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_L1IC_LOCK_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_L1IC_LOCK_MASK) 376 377 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_P_AP_MASK (0x30U) 378 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_P_AP_SHIFT (4U) 379 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_P_AP_WIDTH (2U) 380 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_P_AP(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_P_AP_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_P_AP_MASK) 381 382 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_P_L2A_MASK (0xF00U) 383 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_P_L2A_SHIFT (8U) 384 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_P_L2A_WIDTH (4U) 385 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_P_L2A(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_P_L2A_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_P_L2A_MASK) 386 387 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_P_RQOS_MASK (0xF000000U) 388 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_P_RQOS_SHIFT (24U) 389 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_P_RQOS_WIDTH (4U) 390 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_P_RQOS(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_P_RQOS_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD3_ATT0_P_RQOS_MASK) 391 /*! @} */ 392 393 /*! @name P_ADD4_START - PMSS ADD4 START */ 394 /*! @{ */ 395 396 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_START_P_REGION_START_MASK (0xFFFFFU) 397 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_START_P_REGION_START_SHIFT (0U) 398 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_START_P_REGION_START_WIDTH (20U) 399 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_START_P_REGION_START(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_START_P_REGION_START_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_START_P_REGION_START_MASK) 400 401 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_START_INACTIVE_MASK (0x10000000U) 402 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_START_INACTIVE_SHIFT (28U) 403 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_START_INACTIVE_WIDTH (1U) 404 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_START_INACTIVE(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_START_INACTIVE_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_START_INACTIVE_MASK) 405 /*! @} */ 406 407 /*! @name P_ADD4_ATT0 - PMSS ADD4 ATT0 */ 408 /*! @{ */ 409 410 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_L1IC_MASK (0x1U) 411 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_L1IC_SHIFT (0U) 412 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_L1IC_WIDTH (1U) 413 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_L1IC(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_L1IC_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_L1IC_MASK) 414 415 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_L1IC_LOCK_MASK (0x2U) 416 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_L1IC_LOCK_SHIFT (1U) 417 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_L1IC_LOCK_WIDTH (1U) 418 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_L1IC_LOCK(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_L1IC_LOCK_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_L1IC_LOCK_MASK) 419 420 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_P_AP_MASK (0x30U) 421 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_P_AP_SHIFT (4U) 422 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_P_AP_WIDTH (2U) 423 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_P_AP(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_P_AP_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_P_AP_MASK) 424 425 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_P_L2A_MASK (0xF00U) 426 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_P_L2A_SHIFT (8U) 427 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_P_L2A_WIDTH (4U) 428 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_P_L2A(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_P_L2A_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_P_L2A_MASK) 429 430 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_P_RQOS_MASK (0xF000000U) 431 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_P_RQOS_SHIFT (24U) 432 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_P_RQOS_WIDTH (4U) 433 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_P_RQOS(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_P_RQOS_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD4_ATT0_P_RQOS_MASK) 434 /*! @} */ 435 436 /*! @name P_ADD5_START - PMSS ADD5 START */ 437 /*! @{ */ 438 439 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_START_P_REGION_START_MASK (0xFFFFFU) 440 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_START_P_REGION_START_SHIFT (0U) 441 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_START_P_REGION_START_WIDTH (20U) 442 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_START_P_REGION_START(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_START_P_REGION_START_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_START_P_REGION_START_MASK) 443 444 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_START_INACTIVE_MASK (0x10000000U) 445 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_START_INACTIVE_SHIFT (28U) 446 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_START_INACTIVE_WIDTH (1U) 447 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_START_INACTIVE(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_START_INACTIVE_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_START_INACTIVE_MASK) 448 /*! @} */ 449 450 /*! @name P_ADD5_ATT0 - PMSS ADD5 ATT0 */ 451 /*! @{ */ 452 453 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_L1IC_MASK (0x1U) 454 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_L1IC_SHIFT (0U) 455 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_L1IC_WIDTH (1U) 456 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_L1IC(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_L1IC_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_L1IC_MASK) 457 458 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_L1IC_LOCK_MASK (0x2U) 459 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_L1IC_LOCK_SHIFT (1U) 460 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_L1IC_LOCK_WIDTH (1U) 461 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_L1IC_LOCK(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_L1IC_LOCK_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_L1IC_LOCK_MASK) 462 463 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_P_AP_MASK (0x30U) 464 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_P_AP_SHIFT (4U) 465 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_P_AP_WIDTH (2U) 466 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_P_AP(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_P_AP_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_P_AP_MASK) 467 468 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_P_L2A_MASK (0xF00U) 469 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_P_L2A_SHIFT (8U) 470 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_P_L2A_WIDTH (4U) 471 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_P_L2A(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_P_L2A_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_P_L2A_MASK) 472 473 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_P_RQOS_MASK (0xF000000U) 474 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_P_RQOS_SHIFT (24U) 475 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_P_RQOS_WIDTH (4U) 476 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_P_RQOS(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_P_RQOS_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD5_ATT0_P_RQOS_MASK) 477 /*! @} */ 478 479 /*! @name P_ADD6_START - PMSS ADD6 START */ 480 /*! @{ */ 481 482 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_START_P_REGION_START_MASK (0xFFFFFU) 483 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_START_P_REGION_START_SHIFT (0U) 484 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_START_P_REGION_START_WIDTH (20U) 485 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_START_P_REGION_START(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_START_P_REGION_START_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_START_P_REGION_START_MASK) 486 487 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_START_INACTIVE_MASK (0x10000000U) 488 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_START_INACTIVE_SHIFT (28U) 489 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_START_INACTIVE_WIDTH (1U) 490 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_START_INACTIVE(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_START_INACTIVE_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_START_INACTIVE_MASK) 491 /*! @} */ 492 493 /*! @name P_ADD6_ATT0 - PMSS ADD6 ATT0 */ 494 /*! @{ */ 495 496 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_L1IC_MASK (0x1U) 497 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_L1IC_SHIFT (0U) 498 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_L1IC_WIDTH (1U) 499 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_L1IC(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_L1IC_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_L1IC_MASK) 500 501 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_L1IC_LOCK_MASK (0x2U) 502 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_L1IC_LOCK_SHIFT (1U) 503 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_L1IC_LOCK_WIDTH (1U) 504 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_L1IC_LOCK(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_L1IC_LOCK_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_L1IC_LOCK_MASK) 505 506 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_P_AP_MASK (0x30U) 507 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_P_AP_SHIFT (4U) 508 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_P_AP_WIDTH (2U) 509 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_P_AP(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_P_AP_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_P_AP_MASK) 510 511 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_P_L2A_MASK (0xF00U) 512 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_P_L2A_SHIFT (8U) 513 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_P_L2A_WIDTH (4U) 514 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_P_L2A(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_P_L2A_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_P_L2A_MASK) 515 516 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_P_RQOS_MASK (0xF000000U) 517 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_P_RQOS_SHIFT (24U) 518 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_P_RQOS_WIDTH (4U) 519 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_P_RQOS(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_P_RQOS_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD6_ATT0_P_RQOS_MASK) 520 /*! @} */ 521 522 /*! @name P_ADD7_START - PMSS ADD7 START */ 523 /*! @{ */ 524 525 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_START_P_REGION_START_MASK (0xFFFFFU) 526 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_START_P_REGION_START_SHIFT (0U) 527 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_START_P_REGION_START_WIDTH (20U) 528 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_START_P_REGION_START(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_START_P_REGION_START_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_START_P_REGION_START_MASK) 529 530 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_START_INACTIVE_MASK (0x10000000U) 531 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_START_INACTIVE_SHIFT (28U) 532 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_START_INACTIVE_WIDTH (1U) 533 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_START_INACTIVE(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_START_INACTIVE_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_START_INACTIVE_MASK) 534 /*! @} */ 535 536 /*! @name P_ADD7_ATT0 - PMSS ADD7 ATT0 */ 537 /*! @{ */ 538 539 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_L1IC_MASK (0x1U) 540 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_L1IC_SHIFT (0U) 541 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_L1IC_WIDTH (1U) 542 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_L1IC(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_L1IC_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_L1IC_MASK) 543 544 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_L1IC_LOCK_MASK (0x2U) 545 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_L1IC_LOCK_SHIFT (1U) 546 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_L1IC_LOCK_WIDTH (1U) 547 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_L1IC_LOCK(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_L1IC_LOCK_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_L1IC_LOCK_MASK) 548 549 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_P_AP_MASK (0x30U) 550 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_P_AP_SHIFT (4U) 551 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_P_AP_WIDTH (2U) 552 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_P_AP(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_P_AP_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_P_AP_MASK) 553 554 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_P_L2A_MASK (0xF00U) 555 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_P_L2A_SHIFT (8U) 556 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_P_L2A_WIDTH (4U) 557 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_P_L2A(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_P_L2A_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_P_L2A_MASK) 558 559 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_P_RQOS_MASK (0xF000000U) 560 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_P_RQOS_SHIFT (24U) 561 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_P_RQOS_WIDTH (4U) 562 #define PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_P_RQOS(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_P_RQOS_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ADD7_ATT0_P_RQOS_MASK) 563 /*! @} */ 564 565 /*! @name P_CCOSAR - Program Cache Software Operations */ 566 /*! @{ */ 567 568 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOSAR_P_CCOSA_MASK (0xFFFFFFC0U) 569 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOSAR_P_CCOSA_SHIFT (6U) 570 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOSAR_P_CCOSA_WIDTH (26U) 571 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOSAR_P_CCOSA(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_CCOSAR_P_CCOSA_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_CCOSAR_P_CCOSA_MASK) 572 /*! @} */ 573 574 /*! @name P_CCOCR - Program Cache Software Operations Control */ 575 /*! @{ */ 576 577 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_ACTIVE_MASK (0x1U) 578 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_ACTIVE_SHIFT (0U) 579 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_ACTIVE_WIDTH (1U) 580 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_ACTIVE(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_ACTIVE_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_ACTIVE_MASK) 581 582 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_L1ICO_MASK (0x2U) 583 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_L1ICO_SHIFT (1U) 584 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_L1ICO_WIDTH (1U) 585 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_L1ICO(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_L1ICO_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_L1ICO_MASK) 586 587 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_OT_MASK (0x3CU) 588 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_OT_SHIFT (2U) 589 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_OT_WIDTH (4U) 590 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_OT(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_OT_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_OT_MASK) 591 592 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_OS_MASK (0x80U) 593 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_OS_SHIFT (7U) 594 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_OS_WIDTH (1U) 595 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_OS(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_OS_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_OS_MASK) 596 597 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_NOBPL_MASK (0xFFFF0000U) 598 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_NOBPL_SHIFT (16U) 599 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_NOBPL_WIDTH (16U) 600 #define PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_NOBPL(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_NOBPL_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_CCOCR_P_NOBPL_MASK) 601 /*! @} */ 602 603 /*! @name P_ECADD - Program ECC Error Address */ 604 /*! @{ */ 605 606 #define PROGRAM_MEMORY_SUBSYSTEM_P_ECADD_ECADD_MASK (0xFFFFFFE0U) 607 #define PROGRAM_MEMORY_SUBSYSTEM_P_ECADD_ECADD_SHIFT (5U) 608 #define PROGRAM_MEMORY_SUBSYSTEM_P_ECADD_ECADD_WIDTH (27U) 609 #define PROGRAM_MEMORY_SUBSYSTEM_P_ECADD_ECADD(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_P_ECADD_ECADD_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_P_ECADD_ECADD_MASK) 610 /*! @} */ 611 612 /*! @name PMSSACS - PMSS Access Control */ 613 /*! @{ */ 614 615 #define PROGRAM_MEMORY_SUBSYSTEM_PMSSACS_PMSS_ACS_MASK (0xFFFFU) 616 #define PROGRAM_MEMORY_SUBSYSTEM_PMSSACS_PMSS_ACS_SHIFT (0U) 617 #define PROGRAM_MEMORY_SUBSYSTEM_PMSSACS_PMSS_ACS_WIDTH (16U) 618 #define PROGRAM_MEMORY_SUBSYSTEM_PMSSACS_PMSS_ACS(x) (((uint32_t)(((uint32_t)(x)) << PROGRAM_MEMORY_SUBSYSTEM_PMSSACS_PMSS_ACS_SHIFT)) & PROGRAM_MEMORY_SUBSYSTEM_PMSSACS_PMSS_ACS_MASK) 619 /*! @} */ 620 621 /*! 622 * @} 623 */ /* end of group PROGRAM_MEMORY_SUBSYSTEM_Register_Masks */ 624 625 /*! 626 * @} 627 */ /* end of group PROGRAM_MEMORY_SUBSYSTEM_Peripheral_Access_Layer */ 628 629 #endif /* #if !defined(S32Z2_PROGRAM_MEMORY_SUBSYSTEM_H_) */ 630
