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Searched refs:PXP_STAT_CLR_AXI_WRITE_ERROR_MASK (Results 1 – 11 of 11) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h37732 #define PXP_STAT_CLR_AXI_WRITE_ERROR_MASK (0x2U) macro
37738 …t32_t)(((uint32_t)(x)) << PXP_STAT_CLR_AXI_WRITE_ERROR_SHIFT)) & PXP_STAT_CLR_AXI_WRITE_ERROR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h38227 #define PXP_STAT_CLR_AXI_WRITE_ERROR_MASK (0x2U) macro
38233 …t32_t)(((uint32_t)(x)) << PXP_STAT_CLR_AXI_WRITE_ERROR_SHIFT)) & PXP_STAT_CLR_AXI_WRITE_ERROR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h39768 #define PXP_STAT_CLR_AXI_WRITE_ERROR_MASK (0x2U) macro
39774 …t32_t)(((uint32_t)(x)) << PXP_STAT_CLR_AXI_WRITE_ERROR_SHIFT)) & PXP_STAT_CLR_AXI_WRITE_ERROR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h39761 #define PXP_STAT_CLR_AXI_WRITE_ERROR_MASK (0x2U) macro
39767 …t32_t)(((uint32_t)(x)) << PXP_STAT_CLR_AXI_WRITE_ERROR_SHIFT)) & PXP_STAT_CLR_AXI_WRITE_ERROR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h67948 #define PXP_STAT_CLR_AXI_WRITE_ERROR_MASK (0x2U) macro
67954 …t32_t)(((uint32_t)(x)) << PXP_STAT_CLR_AXI_WRITE_ERROR_SHIFT)) & PXP_STAT_CLR_AXI_WRITE_ERROR_MASK)
DMIMXRT1166_cm7.h67046 #define PXP_STAT_CLR_AXI_WRITE_ERROR_MASK (0x2U) macro
67052 …t32_t)(((uint32_t)(x)) << PXP_STAT_CLR_AXI_WRITE_ERROR_SHIFT)) & PXP_STAT_CLR_AXI_WRITE_ERROR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h68447 #define PXP_STAT_CLR_AXI_WRITE_ERROR_MASK (0x2U) macro
68453 …t32_t)(((uint32_t)(x)) << PXP_STAT_CLR_AXI_WRITE_ERROR_SHIFT)) & PXP_STAT_CLR_AXI_WRITE_ERROR_MASK)
DMIMXRT1173_cm7.h67545 #define PXP_STAT_CLR_AXI_WRITE_ERROR_MASK (0x2U) macro
67551 …t32_t)(((uint32_t)(x)) << PXP_STAT_CLR_AXI_WRITE_ERROR_SHIFT)) & PXP_STAT_CLR_AXI_WRITE_ERROR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h67548 #define PXP_STAT_CLR_AXI_WRITE_ERROR_MASK (0x2U) macro
67554 …t32_t)(((uint32_t)(x)) << PXP_STAT_CLR_AXI_WRITE_ERROR_SHIFT)) & PXP_STAT_CLR_AXI_WRITE_ERROR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h78215 #define PXP_STAT_CLR_AXI_WRITE_ERROR_MASK (0x2U) macro
78221 …t32_t)(((uint32_t)(x)) << PXP_STAT_CLR_AXI_WRITE_ERROR_SHIFT)) & PXP_STAT_CLR_AXI_WRITE_ERROR_MASK)
DMIMXRT1176_cm4.h79117 #define PXP_STAT_CLR_AXI_WRITE_ERROR_MASK (0x2U) macro
79123 …t32_t)(((uint32_t)(x)) << PXP_STAT_CLR_AXI_WRITE_ERROR_SHIFT)) & PXP_STAT_CLR_AXI_WRITE_ERROR_MASK)