| /hal_nxp-latest/mcux/mcux-sdk/drivers/ipwm/ |
| D | fsl_pwm.h | 293 uint32_t statusFlags = base->PWMSR; in PWM_GetStatusFlags()
308 …base->PWMSR = (mask & (PWM_PWMSR_FE_MASK | PWM_PWMSR_ROV_MASK | PWM_PWMSR_CMP_MASK | PWM_PWMSR_FWE… in PWM_clearStatusFlags()
321 return (base->PWMSR & PWM_PWMSR_FIFOAV_MASK); in PWM_GetFIFOAvailable()
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| /hal_nxp-latest/imx/devices/MCIMX6X/ |
| D | MCIMX6X_M4.h | 29199 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
29217 #define PWM_PWMSR_REG(base) ((base)->PWMSR)
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| /hal_nxp-latest/imx/devices/MCIMX7D/ |
| D | MCIMX7D_M4.h | 33237 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
33255 #define PWM_PWMSR_REG(base) ((base)->PWMSR)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/ |
| D | MIMX8MN5_cm7.h | 43381 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/ |
| D | MIMX8MN2_cm7.h | 43379 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/ |
| D | MIMX8MN4_cm7.h | 43379 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/ |
| D | MIMX8MN3_cm7.h | 43381 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/ |
| D | MIMX8MN1_cm7.h | 43381 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/ |
| D | MIMX8MN6_cm7.h | 43379 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| D | MIMX8MN6_ca53.h | 43393 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/ |
| D | MIMX8MQ5_cm4.h | 43707 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/ |
| D | MIMX8MD7_cm4.h | 45880 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD6/ |
| D | MIMX8MD6_cm4.h | 45880 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ6/ |
| D | MIMX8MQ6_cm4.h | 45880 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ7/ |
| D | MIMX8MQ7_cm4.h | 45880 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/ |
| D | MIMX8QM6_ca53.h | 70464 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| D | MIMX8QM6_dsp.h | 76099 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM3/ |
| D | MIMX8MM3_cm4.h | 61876 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM5/ |
| D | MIMX8MM5_cm4.h | 61876 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM6/ |
| D | MIMX8MM6_cm4.h | 61876 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| D | MIMX8MM6_ca53.h | 61341 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM1/ |
| D | MIMX8MM1_cm4.h | 61876 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM2/ |
| D | MIMX8MM2_cm4.h | 61876 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM4/ |
| D | MIMX8MM4_cm4.h | 61876 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/ |
| D | MIMX8ML6_cm7.h | 88462 __IO uint32_t PWMSR; /**< PWM Status Register, offset: 0x4 */ member
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