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Searched refs:PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h62209 #define PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK (0xC0000U) macro
62212 …(uint32_t)(x)) << PUF_IDXBLK_STATUS_IDXBLK_STATUS9_SHIFT)) & PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK)
DMIMXRT1175_cm7.h61307 #define PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK (0xC0000U) macro
61310 …(uint32_t)(x)) << PUF_IDXBLK_STATUS_IDXBLK_STATUS9_SHIFT)) & PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h60783 #define PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK (0xC0000U) macro
60786 …(uint32_t)(x)) << PUF_IDXBLK_STATUS_IDXBLK_STATUS9_SHIFT)) & PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK)
DMIMXRT1165_cm4.h61685 #define PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK (0xC0000U) macro
61688 …(uint32_t)(x)) << PUF_IDXBLK_STATUS_IDXBLK_STATUS9_SHIFT)) & PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h61307 #define PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK (0xC0000U) macro
61310 …(uint32_t)(x)) << PUF_IDXBLK_STATUS_IDXBLK_STATUS9_SHIFT)) & PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h65593 #define PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK (0xC0000U) macro
65596 …(uint32_t)(x)) << PUF_IDXBLK_STATUS_IDXBLK_STATUS9_SHIFT)) & PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK)
DMIMXRT1166_cm7.h64691 #define PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK (0xC0000U) macro
64694 …(uint32_t)(x)) << PUF_IDXBLK_STATUS_IDXBLK_STATUS9_SHIFT)) & PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h66114 #define PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK (0xC0000U) macro
66117 …(uint32_t)(x)) << PUF_IDXBLK_STATUS_IDXBLK_STATUS9_SHIFT)) & PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK)
DMIMXRT1173_cm7.h65212 #define PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK (0xC0000U) macro
65215 …(uint32_t)(x)) << PUF_IDXBLK_STATUS_IDXBLK_STATUS9_SHIFT)) & PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h65215 #define PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK (0xC0000U) macro
65218 …(uint32_t)(x)) << PUF_IDXBLK_STATUS_IDXBLK_STATUS9_SHIFT)) & PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h75882 #define PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK (0xC0000U) macro
75885 …(uint32_t)(x)) << PUF_IDXBLK_STATUS_IDXBLK_STATUS9_SHIFT)) & PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK)
DMIMXRT1176_cm4.h76784 #define PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK (0xC0000U) macro
76787 …(uint32_t)(x)) << PUF_IDXBLK_STATUS_IDXBLK_STATUS9_SHIFT)) & PUF_IDXBLK_STATUS_IDXBLK_STATUS9_MASK)