Home
last modified time | relevance | path

Searched refs:PUF_IDXBLK_L_DP_IDX0_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h18001 #define PUF_IDXBLK_L_DP_IDX0_MASK (0x3U) macro
18004 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_L_DP_IDX0_SHIFT)) & PUF_IDXBLK_L_DP_IDX0_MASK)
DMIMXRT685S_cm33.h25798 #define PUF_IDXBLK_L_DP_IDX0_MASK (0x3U) macro
25801 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_L_DP_IDX0_SHIFT)) & PUF_IDXBLK_L_DP_IDX0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h25798 #define PUF_IDXBLK_L_DP_IDX0_MASK (0x3U) macro
25801 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_L_DP_IDX0_SHIFT)) & PUF_IDXBLK_L_DP_IDX0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h30272 #define PUF_IDXBLK_L_DP_IDX0_MASK (0x3U) macro
30279 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_L_DP_IDX0_SHIFT)) & PUF_IDXBLK_L_DP_IDX0_MASK)
DMIMXRT595S_cm33.h37538 #define PUF_IDXBLK_L_DP_IDX0_MASK (0x3U) macro
37545 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_L_DP_IDX0_SHIFT)) & PUF_IDXBLK_L_DP_IDX0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h35911 #define PUF_IDXBLK_L_DP_IDX0_MASK (0x3U) macro
35918 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_L_DP_IDX0_SHIFT)) & PUF_IDXBLK_L_DP_IDX0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h37537 #define PUF_IDXBLK_L_DP_IDX0_MASK (0x3U) macro
37544 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_L_DP_IDX0_SHIFT)) & PUF_IDXBLK_L_DP_IDX0_MASK)