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Searched refs:PUF_IDXBLK_H_IDX15_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S26/
DLPC55S26.h16549 #define PUF_IDXBLK_H_IDX15_MASK (0xC000U) macro
16553 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_IDX15_SHIFT)) & PUF_IDXBLK_H_IDX15_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S28/
DLPC55S28.h16548 #define PUF_IDXBLK_H_IDX15_MASK (0xC000U) macro
16552 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_IDX15_SHIFT)) & PUF_IDXBLK_H_IDX15_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S66/
DLPC55S66_cm33_core1.h17147 #define PUF_IDXBLK_H_IDX15_MASK (0xC000U) macro
17151 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_IDX15_SHIFT)) & PUF_IDXBLK_H_IDX15_MASK)
DLPC55S66_cm33_core0.h17147 #define PUF_IDXBLK_H_IDX15_MASK (0xC000U) macro
17151 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_IDX15_SHIFT)) & PUF_IDXBLK_H_IDX15_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S69/
DLPC55S69_cm33_core1.h17146 #define PUF_IDXBLK_H_IDX15_MASK (0xC000U) macro
17150 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_IDX15_SHIFT)) & PUF_IDXBLK_H_IDX15_MASK)
DLPC55S69_cm33_core0.h17146 #define PUF_IDXBLK_H_IDX15_MASK (0xC000U) macro
17150 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_IDX15_SHIFT)) & PUF_IDXBLK_H_IDX15_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h17987 #define PUF_IDXBLK_H_IDX15_MASK (0xC000U) macro
17990 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_IDX15_SHIFT)) & PUF_IDXBLK_H_IDX15_MASK)
DMIMXRT685S_cm33.h25784 #define PUF_IDXBLK_H_IDX15_MASK (0xC000U) macro
25787 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_IDX15_SHIFT)) & PUF_IDXBLK_H_IDX15_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h25784 #define PUF_IDXBLK_H_IDX15_MASK (0xC000U) macro
25787 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_IDX15_SHIFT)) & PUF_IDXBLK_H_IDX15_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h30254 #define PUF_IDXBLK_H_IDX15_MASK (0xC000U) macro
30261 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_IDX15_SHIFT)) & PUF_IDXBLK_H_IDX15_MASK)
DMIMXRT595S_cm33.h37520 #define PUF_IDXBLK_H_IDX15_MASK (0xC000U) macro
37527 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_IDX15_SHIFT)) & PUF_IDXBLK_H_IDX15_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h35893 #define PUF_IDXBLK_H_IDX15_MASK (0xC000U) macro
35900 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_IDX15_SHIFT)) & PUF_IDXBLK_H_IDX15_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h37519 #define PUF_IDXBLK_H_IDX15_MASK (0xC000U) macro
37526 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_IDX15_SHIFT)) & PUF_IDXBLK_H_IDX15_MASK)