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Searched refs:PUF_IDXBLK_H_DP_IDX11_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S26/
DLPC55S26.h16462 #define PUF_IDXBLK_H_DP_IDX11_MASK (0xC0U) macro
16466 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_DP_IDX11_SHIFT)) & PUF_IDXBLK_H_DP_IDX11_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S28/
DLPC55S28.h16461 #define PUF_IDXBLK_H_DP_IDX11_MASK (0xC0U) macro
16465 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_DP_IDX11_SHIFT)) & PUF_IDXBLK_H_DP_IDX11_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S66/
DLPC55S66_cm33_core1.h17060 #define PUF_IDXBLK_H_DP_IDX11_MASK (0xC0U) macro
17064 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_DP_IDX11_SHIFT)) & PUF_IDXBLK_H_DP_IDX11_MASK)
DLPC55S66_cm33_core0.h17060 #define PUF_IDXBLK_H_DP_IDX11_MASK (0xC0U) macro
17064 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_DP_IDX11_SHIFT)) & PUF_IDXBLK_H_DP_IDX11_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S69/
DLPC55S69_cm33_core1.h17059 #define PUF_IDXBLK_H_DP_IDX11_MASK (0xC0U) macro
17063 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_DP_IDX11_SHIFT)) & PUF_IDXBLK_H_DP_IDX11_MASK)
DLPC55S69_cm33_core0.h17059 #define PUF_IDXBLK_H_DP_IDX11_MASK (0xC0U) macro
17063 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_DP_IDX11_SHIFT)) & PUF_IDXBLK_H_DP_IDX11_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h17911 #define PUF_IDXBLK_H_DP_IDX11_MASK (0xC0U) macro
17914 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_DP_IDX11_SHIFT)) & PUF_IDXBLK_H_DP_IDX11_MASK)
DMIMXRT685S_cm33.h25708 #define PUF_IDXBLK_H_DP_IDX11_MASK (0xC0U) macro
25711 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_DP_IDX11_SHIFT)) & PUF_IDXBLK_H_DP_IDX11_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h25708 #define PUF_IDXBLK_H_DP_IDX11_MASK (0xC0U) macro
25711 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_DP_IDX11_SHIFT)) & PUF_IDXBLK_H_DP_IDX11_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h30130 #define PUF_IDXBLK_H_DP_IDX11_MASK (0xC0U) macro
30137 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_DP_IDX11_SHIFT)) & PUF_IDXBLK_H_DP_IDX11_MASK)
DMIMXRT595S_cm33.h37396 #define PUF_IDXBLK_H_DP_IDX11_MASK (0xC0U) macro
37403 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_DP_IDX11_SHIFT)) & PUF_IDXBLK_H_DP_IDX11_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h35769 #define PUF_IDXBLK_H_DP_IDX11_MASK (0xC0U) macro
35776 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_DP_IDX11_SHIFT)) & PUF_IDXBLK_H_DP_IDX11_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h37395 #define PUF_IDXBLK_H_DP_IDX11_MASK (0xC0U) macro
37402 … (((uint32_t)(((uint32_t)(x)) << PUF_IDXBLK_H_DP_IDX11_SHIFT)) & PUF_IDXBLK_H_DP_IDX11_MASK)