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Searched refs:PUF_CFG_PUF_BLOCK_ENROLL_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/drivers/puf/
Dfsl_puf.h313 #if defined(PUF_CFG_PUF_BLOCK_ENROLL_MASK) && PUF_CFG_PUF_BLOCK_ENROLL_MASK
316 base->CFG |= PUF_CFG_PUF_BLOCK_ENROLL_MASK; /* block enroll */ in PUF_BlockEnroll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm4.h61376 #define PUF_CFG_PUF_BLOCK_ENROLL_MASK (0x2U) macro
61382 … (((uint32_t)(((uint32_t)(x)) << PUF_CFG_PUF_BLOCK_ENROLL_SHIFT)) & PUF_CFG_PUF_BLOCK_ENROLL_MASK)
DMIMXRT1165_cm7.h60474 #define PUF_CFG_PUF_BLOCK_ENROLL_MASK (0x2U) macro
60480 … (((uint32_t)(((uint32_t)(x)) << PUF_CFG_PUF_BLOCK_ENROLL_SHIFT)) & PUF_CFG_PUF_BLOCK_ENROLL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h60998 #define PUF_CFG_PUF_BLOCK_ENROLL_MASK (0x2U) macro
61004 … (((uint32_t)(((uint32_t)(x)) << PUF_CFG_PUF_BLOCK_ENROLL_SHIFT)) & PUF_CFG_PUF_BLOCK_ENROLL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h61900 #define PUF_CFG_PUF_BLOCK_ENROLL_MASK (0x2U) macro
61906 … (((uint32_t)(((uint32_t)(x)) << PUF_CFG_PUF_BLOCK_ENROLL_SHIFT)) & PUF_CFG_PUF_BLOCK_ENROLL_MASK)
DMIMXRT1175_cm7.h60998 #define PUF_CFG_PUF_BLOCK_ENROLL_MASK (0x2U) macro
61004 … (((uint32_t)(((uint32_t)(x)) << PUF_CFG_PUF_BLOCK_ENROLL_SHIFT)) & PUF_CFG_PUF_BLOCK_ENROLL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm7.h64903 #define PUF_CFG_PUF_BLOCK_ENROLL_MASK (0x2U) macro
64909 … (((uint32_t)(((uint32_t)(x)) << PUF_CFG_PUF_BLOCK_ENROLL_SHIFT)) & PUF_CFG_PUF_BLOCK_ENROLL_MASK)
DMIMXRT1173_cm4.h65805 #define PUF_CFG_PUF_BLOCK_ENROLL_MASK (0x2U) macro
65811 … (((uint32_t)(((uint32_t)(x)) << PUF_CFG_PUF_BLOCK_ENROLL_SHIFT)) & PUF_CFG_PUF_BLOCK_ENROLL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm7.h64382 #define PUF_CFG_PUF_BLOCK_ENROLL_MASK (0x2U) macro
64388 … (((uint32_t)(((uint32_t)(x)) << PUF_CFG_PUF_BLOCK_ENROLL_SHIFT)) & PUF_CFG_PUF_BLOCK_ENROLL_MASK)
DMIMXRT1166_cm4.h65284 #define PUF_CFG_PUF_BLOCK_ENROLL_MASK (0x2U) macro
65290 … (((uint32_t)(((uint32_t)(x)) << PUF_CFG_PUF_BLOCK_ENROLL_SHIFT)) & PUF_CFG_PUF_BLOCK_ENROLL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h64906 #define PUF_CFG_PUF_BLOCK_ENROLL_MASK (0x2U) macro
64912 … (((uint32_t)(((uint32_t)(x)) << PUF_CFG_PUF_BLOCK_ENROLL_SHIFT)) & PUF_CFG_PUF_BLOCK_ENROLL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h75573 #define PUF_CFG_PUF_BLOCK_ENROLL_MASK (0x2U) macro
75579 … (((uint32_t)(((uint32_t)(x)) << PUF_CFG_PUF_BLOCK_ENROLL_SHIFT)) & PUF_CFG_PUF_BLOCK_ENROLL_MASK)
DMIMXRT1176_cm4.h76475 #define PUF_CFG_PUF_BLOCK_ENROLL_MASK (0x2U) macro
76481 … (((uint32_t)(((uint32_t)(x)) << PUF_CFG_PUF_BLOCK_ENROLL_SHIFT)) & PUF_CFG_PUF_BLOCK_ENROLL_MASK)