1 /*
2  * Copyright 1997-2016 Freescale Semiconductor, Inc.
3  * Copyright 2016-2024 NXP
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 /*!
9  * @file S32Z2_PROFILER.h
10  * @version 2.3
11  * @date 2024-05-03
12  * @brief Peripheral Access Layer for S32Z2_PROFILER
13  *
14  * This file contains register definitions and macros for easy access to their
15  * bit fields.
16  *
17  * This file assumes LITTLE endian system.
18  */
19 
20 /**
21 * @page misra_violations MISRA-C:2012 violations
22 *
23 * @section [global]
24 * Violates MISRA 2012 Advisory Rule 2.3, local typedef not referenced
25 * The SoC header defines typedef for all modules.
26 *
27 * @section [global]
28 * Violates MISRA 2012 Advisory Rule 2.5, local macro not referenced
29 * The SoC header defines macros for all modules and registers.
30 *
31 * @section [global]
32 * Violates MISRA 2012 Advisory Directive 4.9, Function-like macro
33 * These are generated macros used for accessing the bit-fields from registers.
34 *
35 * @section [global]
36 * Violates MISRA 2012 Required Rule 5.1, identifier clash
37 * The supported compilers use more than 31 significant characters for identifiers.
38 *
39 * @section [global]
40 * Violates MISRA 2012 Required Rule 5.2, identifier clash
41 * The supported compilers use more than 31 significant characters for identifiers.
42 *
43 * @section [global]
44 * Violates MISRA 2012 Required Rule 5.4, identifier clash
45 * The supported compilers use more than 31 significant characters for identifiers.
46 *
47 * @section [global]
48 * Violates MISRA 2012 Required Rule 5.5, identifier clash
49 * The supported compilers use more than 31 significant characters for identifiers.
50 *
51 * @section [global]
52 * Violates MISRA 2012 Required Rule 21.1, defined macro '__I' is reserved to the compiler
53 * This type qualifier is needed to ensure correct I/O access and addressing.
54 */
55 
56 /* Prevention from multiple including the same memory map */
57 #if !defined(S32Z2_PROFILER_H_)  /* Check if memory map has not been already included */
58 #define S32Z2_PROFILER_H_
59 
60 #include "S32Z2_COMMON.h"
61 
62 /* ----------------------------------------------------------------------------
63    -- PROFILER Peripheral Access Layer
64    ---------------------------------------------------------------------------- */
65 
66 /*!
67  * @addtogroup PROFILER_Peripheral_Access_Layer PROFILER Peripheral Access Layer
68  * @{
69  */
70 
71 /** PROFILER - Size of Registers Arrays */
72 #define PROFILER_PROF_CNTX_COUNT                  8u
73 #define PROFILER_PROF_EV_MASKX_COUNT              8u
74 
75 /** PROFILER - Register Layout Typedef */
76 typedef struct {
77   __IO uint32_t PROF_CTL;                          /**< PROF CTL Register, offset: 0x0 */
78   __IO uint32_t PROF_PAUSE;                        /**< PROF PAUSE Register, offset: 0x4 */
79   __IO uint32_t PROF_CTRL0;                        /**< PROF CTRL0 Register, offset: 0x8 */
80   __IO uint32_t PROF_CTRL1;                        /**< PROF CTRL1 Register, offset: 0xC */
81   __I  uint32_t FRCC;                              /**< FRCC Register, offset: 0x10 */
82   uint8_t RESERVED_0[12];
83   __I  uint32_t PROF_CNTX[PROFILER_PROF_CNTX_COUNT]; /**< PROF CNTx Register, array offset: 0x20, array step: 0x4 */
84   uint8_t RESERVED_1[64];
85   __IO uint32_t PROF_EV_MASKX[PROFILER_PROF_EV_MASKX_COUNT]; /**< PROF EV MASKx Register, array offset: 0x80, array step: 0x4 */
86 } PROFILER_Type, *PROFILER_MemMapPtr;
87 
88 /** Number of instances of the PROFILER module. */
89 #define PROFILER_INSTANCE_COUNT                  (1u)
90 
91 /* PROFILER - Peripheral instance base addresses */
92 /** Peripheral CEVA_SPF2__PROFILER base address */
93 #define IP_CEVA_SPF2__PROFILER_BASE              (0x24400300u)
94 /** Peripheral CEVA_SPF2__PROFILER base pointer */
95 #define IP_CEVA_SPF2__PROFILER                   ((PROFILER_Type *)IP_CEVA_SPF2__PROFILER_BASE)
96 /** Array initializer of PROFILER peripheral base addresses */
97 #define IP_PROFILER_BASE_ADDRS                   { IP_CEVA_SPF2__PROFILER_BASE }
98 /** Array initializer of PROFILER peripheral base pointers */
99 #define IP_PROFILER_BASE_PTRS                    { IP_CEVA_SPF2__PROFILER }
100 
101 /* ----------------------------------------------------------------------------
102    -- PROFILER Register Masks
103    ---------------------------------------------------------------------------- */
104 
105 /*!
106  * @addtogroup PROFILER_Register_Masks PROFILER Register Masks
107  * @{
108  */
109 
110 /*! @name PROF_CTL - PROF CTL Register */
111 /*! @{ */
112 
113 #define PROFILER_PROF_CTL_FRCC_RST_MASK          (0x1U)
114 #define PROFILER_PROF_CTL_FRCC_RST_SHIFT         (0U)
115 #define PROFILER_PROF_CTL_FRCC_RST_WIDTH         (1U)
116 #define PROFILER_PROF_CTL_FRCC_RST(x)            (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_CTL_FRCC_RST_SHIFT)) & PROFILER_PROF_CTL_FRCC_RST_MASK)
117 
118 #define PROFILER_PROF_CTL_PROF_CNT0_RST_MASK     (0x2U)
119 #define PROFILER_PROF_CTL_PROF_CNT0_RST_SHIFT    (1U)
120 #define PROFILER_PROF_CTL_PROF_CNT0_RST_WIDTH    (1U)
121 #define PROFILER_PROF_CTL_PROF_CNT0_RST(x)       (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_CTL_PROF_CNT0_RST_SHIFT)) & PROFILER_PROF_CTL_PROF_CNT0_RST_MASK)
122 
123 #define PROFILER_PROF_CTL_PROF_CNT1_RST_MASK     (0x4U)
124 #define PROFILER_PROF_CTL_PROF_CNT1_RST_SHIFT    (2U)
125 #define PROFILER_PROF_CTL_PROF_CNT1_RST_WIDTH    (1U)
126 #define PROFILER_PROF_CTL_PROF_CNT1_RST(x)       (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_CTL_PROF_CNT1_RST_SHIFT)) & PROFILER_PROF_CTL_PROF_CNT1_RST_MASK)
127 
128 #define PROFILER_PROF_CTL_PROF_CNT2_RST_MASK     (0x8U)
129 #define PROFILER_PROF_CTL_PROF_CNT2_RST_SHIFT    (3U)
130 #define PROFILER_PROF_CTL_PROF_CNT2_RST_WIDTH    (1U)
131 #define PROFILER_PROF_CTL_PROF_CNT2_RST(x)       (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_CTL_PROF_CNT2_RST_SHIFT)) & PROFILER_PROF_CTL_PROF_CNT2_RST_MASK)
132 
133 #define PROFILER_PROF_CTL_PROF_CNT3_RST_MASK     (0x10U)
134 #define PROFILER_PROF_CTL_PROF_CNT3_RST_SHIFT    (4U)
135 #define PROFILER_PROF_CTL_PROF_CNT3_RST_WIDTH    (1U)
136 #define PROFILER_PROF_CTL_PROF_CNT3_RST(x)       (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_CTL_PROF_CNT3_RST_SHIFT)) & PROFILER_PROF_CTL_PROF_CNT3_RST_MASK)
137 
138 #define PROFILER_PROF_CTL_PROF_CNT4_RST_MASK     (0x20U)
139 #define PROFILER_PROF_CTL_PROF_CNT4_RST_SHIFT    (5U)
140 #define PROFILER_PROF_CTL_PROF_CNT4_RST_WIDTH    (1U)
141 #define PROFILER_PROF_CTL_PROF_CNT4_RST(x)       (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_CTL_PROF_CNT4_RST_SHIFT)) & PROFILER_PROF_CTL_PROF_CNT4_RST_MASK)
142 
143 #define PROFILER_PROF_CTL_PROF_CNT5_RST_MASK     (0x40U)
144 #define PROFILER_PROF_CTL_PROF_CNT5_RST_SHIFT    (6U)
145 #define PROFILER_PROF_CTL_PROF_CNT5_RST_WIDTH    (1U)
146 #define PROFILER_PROF_CTL_PROF_CNT5_RST(x)       (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_CTL_PROF_CNT5_RST_SHIFT)) & PROFILER_PROF_CTL_PROF_CNT5_RST_MASK)
147 
148 #define PROFILER_PROF_CTL_PROF_CNT6_RST_MASK     (0x80U)
149 #define PROFILER_PROF_CTL_PROF_CNT6_RST_SHIFT    (7U)
150 #define PROFILER_PROF_CTL_PROF_CNT6_RST_WIDTH    (1U)
151 #define PROFILER_PROF_CTL_PROF_CNT6_RST(x)       (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_CTL_PROF_CNT6_RST_SHIFT)) & PROFILER_PROF_CTL_PROF_CNT6_RST_MASK)
152 
153 #define PROFILER_PROF_CTL_PROF_CNT7_RST_MASK     (0x100U)
154 #define PROFILER_PROF_CTL_PROF_CNT7_RST_SHIFT    (8U)
155 #define PROFILER_PROF_CTL_PROF_CNT7_RST_WIDTH    (1U)
156 #define PROFILER_PROF_CTL_PROF_CNT7_RST(x)       (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_CTL_PROF_CNT7_RST_SHIFT)) & PROFILER_PROF_CTL_PROF_CNT7_RST_MASK)
157 /*! @} */
158 
159 /*! @name PROF_PAUSE - PROF PAUSE Register */
160 /*! @{ */
161 
162 #define PROFILER_PROF_PAUSE_FRCC_PAUSE_MASK      (0x1U)
163 #define PROFILER_PROF_PAUSE_FRCC_PAUSE_SHIFT     (0U)
164 #define PROFILER_PROF_PAUSE_FRCC_PAUSE_WIDTH     (1U)
165 #define PROFILER_PROF_PAUSE_FRCC_PAUSE(x)        (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_PAUSE_FRCC_PAUSE_SHIFT)) & PROFILER_PROF_PAUSE_FRCC_PAUSE_MASK)
166 
167 #define PROFILER_PROF_PAUSE_PROF_CNT0_PAUSE_MASK (0x2U)
168 #define PROFILER_PROF_PAUSE_PROF_CNT0_PAUSE_SHIFT (1U)
169 #define PROFILER_PROF_PAUSE_PROF_CNT0_PAUSE_WIDTH (1U)
170 #define PROFILER_PROF_PAUSE_PROF_CNT0_PAUSE(x)   (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_PAUSE_PROF_CNT0_PAUSE_SHIFT)) & PROFILER_PROF_PAUSE_PROF_CNT0_PAUSE_MASK)
171 
172 #define PROFILER_PROF_PAUSE_PROF_CNT1_PAUSE_MASK (0x4U)
173 #define PROFILER_PROF_PAUSE_PROF_CNT1_PAUSE_SHIFT (2U)
174 #define PROFILER_PROF_PAUSE_PROF_CNT1_PAUSE_WIDTH (1U)
175 #define PROFILER_PROF_PAUSE_PROF_CNT1_PAUSE(x)   (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_PAUSE_PROF_CNT1_PAUSE_SHIFT)) & PROFILER_PROF_PAUSE_PROF_CNT1_PAUSE_MASK)
176 
177 #define PROFILER_PROF_PAUSE_PROF_CNT2_PAUSE_MASK (0x8U)
178 #define PROFILER_PROF_PAUSE_PROF_CNT2_PAUSE_SHIFT (3U)
179 #define PROFILER_PROF_PAUSE_PROF_CNT2_PAUSE_WIDTH (1U)
180 #define PROFILER_PROF_PAUSE_PROF_CNT2_PAUSE(x)   (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_PAUSE_PROF_CNT2_PAUSE_SHIFT)) & PROFILER_PROF_PAUSE_PROF_CNT2_PAUSE_MASK)
181 
182 #define PROFILER_PROF_PAUSE_PROF_CNT3_PAUSE_MASK (0x10U)
183 #define PROFILER_PROF_PAUSE_PROF_CNT3_PAUSE_SHIFT (4U)
184 #define PROFILER_PROF_PAUSE_PROF_CNT3_PAUSE_WIDTH (1U)
185 #define PROFILER_PROF_PAUSE_PROF_CNT3_PAUSE(x)   (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_PAUSE_PROF_CNT3_PAUSE_SHIFT)) & PROFILER_PROF_PAUSE_PROF_CNT3_PAUSE_MASK)
186 
187 #define PROFILER_PROF_PAUSE_PROF_CNT4_PAUSE_MASK (0x20U)
188 #define PROFILER_PROF_PAUSE_PROF_CNT4_PAUSE_SHIFT (5U)
189 #define PROFILER_PROF_PAUSE_PROF_CNT4_PAUSE_WIDTH (1U)
190 #define PROFILER_PROF_PAUSE_PROF_CNT4_PAUSE(x)   (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_PAUSE_PROF_CNT4_PAUSE_SHIFT)) & PROFILER_PROF_PAUSE_PROF_CNT4_PAUSE_MASK)
191 
192 #define PROFILER_PROF_PAUSE_PROF_CNT5_PAUSE_MASK (0x40U)
193 #define PROFILER_PROF_PAUSE_PROF_CNT5_PAUSE_SHIFT (6U)
194 #define PROFILER_PROF_PAUSE_PROF_CNT5_PAUSE_WIDTH (1U)
195 #define PROFILER_PROF_PAUSE_PROF_CNT5_PAUSE(x)   (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_PAUSE_PROF_CNT5_PAUSE_SHIFT)) & PROFILER_PROF_PAUSE_PROF_CNT5_PAUSE_MASK)
196 
197 #define PROFILER_PROF_PAUSE_PROF_CNT6_PAUSE_MASK (0x80U)
198 #define PROFILER_PROF_PAUSE_PROF_CNT6_PAUSE_SHIFT (7U)
199 #define PROFILER_PROF_PAUSE_PROF_CNT6_PAUSE_WIDTH (1U)
200 #define PROFILER_PROF_PAUSE_PROF_CNT6_PAUSE(x)   (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_PAUSE_PROF_CNT6_PAUSE_SHIFT)) & PROFILER_PROF_PAUSE_PROF_CNT6_PAUSE_MASK)
201 
202 #define PROFILER_PROF_PAUSE_PROF_CNT7_PAUSE_MASK (0x100U)
203 #define PROFILER_PROF_PAUSE_PROF_CNT7_PAUSE_SHIFT (8U)
204 #define PROFILER_PROF_PAUSE_PROF_CNT7_PAUSE_WIDTH (1U)
205 #define PROFILER_PROF_PAUSE_PROF_CNT7_PAUSE(x)   (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_PAUSE_PROF_CNT7_PAUSE_SHIFT)) & PROFILER_PROF_PAUSE_PROF_CNT7_PAUSE_MASK)
206 /*! @} */
207 
208 /*! @name PROF_CTRL0 - PROF CTRL0 Register */
209 /*! @{ */
210 
211 #define PROFILER_PROF_CTRL0_PROF_CNT0_SEL_MASK   (0xFFU)
212 #define PROFILER_PROF_CTRL0_PROF_CNT0_SEL_SHIFT  (0U)
213 #define PROFILER_PROF_CTRL0_PROF_CNT0_SEL_WIDTH  (8U)
214 #define PROFILER_PROF_CTRL0_PROF_CNT0_SEL(x)     (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_CTRL0_PROF_CNT0_SEL_SHIFT)) & PROFILER_PROF_CTRL0_PROF_CNT0_SEL_MASK)
215 
216 #define PROFILER_PROF_CTRL0_PROF_CNT1_SEL_MASK   (0xFF00U)
217 #define PROFILER_PROF_CTRL0_PROF_CNT1_SEL_SHIFT  (8U)
218 #define PROFILER_PROF_CTRL0_PROF_CNT1_SEL_WIDTH  (8U)
219 #define PROFILER_PROF_CTRL0_PROF_CNT1_SEL(x)     (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_CTRL0_PROF_CNT1_SEL_SHIFT)) & PROFILER_PROF_CTRL0_PROF_CNT1_SEL_MASK)
220 
221 #define PROFILER_PROF_CTRL0_PROF_CNT2_SEL_MASK   (0xFF0000U)
222 #define PROFILER_PROF_CTRL0_PROF_CNT2_SEL_SHIFT  (16U)
223 #define PROFILER_PROF_CTRL0_PROF_CNT2_SEL_WIDTH  (8U)
224 #define PROFILER_PROF_CTRL0_PROF_CNT2_SEL(x)     (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_CTRL0_PROF_CNT2_SEL_SHIFT)) & PROFILER_PROF_CTRL0_PROF_CNT2_SEL_MASK)
225 
226 #define PROFILER_PROF_CTRL0_PROF_CNT3_SEL_MASK   (0xFF000000U)
227 #define PROFILER_PROF_CTRL0_PROF_CNT3_SEL_SHIFT  (24U)
228 #define PROFILER_PROF_CTRL0_PROF_CNT3_SEL_WIDTH  (8U)
229 #define PROFILER_PROF_CTRL0_PROF_CNT3_SEL(x)     (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_CTRL0_PROF_CNT3_SEL_SHIFT)) & PROFILER_PROF_CTRL0_PROF_CNT3_SEL_MASK)
230 /*! @} */
231 
232 /*! @name PROF_CTRL1 - PROF CTRL1 Register */
233 /*! @{ */
234 
235 #define PROFILER_PROF_CTRL1_PROF_CNT4_SEL_MASK   (0xFFU)
236 #define PROFILER_PROF_CTRL1_PROF_CNT4_SEL_SHIFT  (0U)
237 #define PROFILER_PROF_CTRL1_PROF_CNT4_SEL_WIDTH  (8U)
238 #define PROFILER_PROF_CTRL1_PROF_CNT4_SEL(x)     (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_CTRL1_PROF_CNT4_SEL_SHIFT)) & PROFILER_PROF_CTRL1_PROF_CNT4_SEL_MASK)
239 
240 #define PROFILER_PROF_CTRL1_PROF_CNT5_SEL_MASK   (0xFF00U)
241 #define PROFILER_PROF_CTRL1_PROF_CNT5_SEL_SHIFT  (8U)
242 #define PROFILER_PROF_CTRL1_PROF_CNT5_SEL_WIDTH  (8U)
243 #define PROFILER_PROF_CTRL1_PROF_CNT5_SEL(x)     (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_CTRL1_PROF_CNT5_SEL_SHIFT)) & PROFILER_PROF_CTRL1_PROF_CNT5_SEL_MASK)
244 
245 #define PROFILER_PROF_CTRL1_PROF_CNT6_SEL_MASK   (0xFF0000U)
246 #define PROFILER_PROF_CTRL1_PROF_CNT6_SEL_SHIFT  (16U)
247 #define PROFILER_PROF_CTRL1_PROF_CNT6_SEL_WIDTH  (8U)
248 #define PROFILER_PROF_CTRL1_PROF_CNT6_SEL(x)     (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_CTRL1_PROF_CNT6_SEL_SHIFT)) & PROFILER_PROF_CTRL1_PROF_CNT6_SEL_MASK)
249 
250 #define PROFILER_PROF_CTRL1_PROF_CNT7_SEL_MASK   (0xFF000000U)
251 #define PROFILER_PROF_CTRL1_PROF_CNT7_SEL_SHIFT  (24U)
252 #define PROFILER_PROF_CTRL1_PROF_CNT7_SEL_WIDTH  (8U)
253 #define PROFILER_PROF_CTRL1_PROF_CNT7_SEL(x)     (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_CTRL1_PROF_CNT7_SEL_SHIFT)) & PROFILER_PROF_CTRL1_PROF_CNT7_SEL_MASK)
254 /*! @} */
255 
256 /*! @name FRCC - FRCC Register */
257 /*! @{ */
258 
259 #define PROFILER_FRCC_FRCC_MASK                  (0xFFFFFFFFU)
260 #define PROFILER_FRCC_FRCC_SHIFT                 (0U)
261 #define PROFILER_FRCC_FRCC_WIDTH                 (32U)
262 #define PROFILER_FRCC_FRCC(x)                    (((uint32_t)(((uint32_t)(x)) << PROFILER_FRCC_FRCC_SHIFT)) & PROFILER_FRCC_FRCC_MASK)
263 /*! @} */
264 
265 /*! @name PROF_CNTX - PROF CNTx Register */
266 /*! @{ */
267 
268 #define PROFILER_PROF_CNTX_PROF_CNTx_MASK        (0xFFFFFFFFU)
269 #define PROFILER_PROF_CNTX_PROF_CNTx_SHIFT       (0U)
270 #define PROFILER_PROF_CNTX_PROF_CNTx_WIDTH       (32U)
271 #define PROFILER_PROF_CNTX_PROF_CNTx(x)          (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_CNTX_PROF_CNTx_SHIFT)) & PROFILER_PROF_CNTX_PROF_CNTx_MASK)
272 /*! @} */
273 
274 /*! @name PROF_EV_MASKX - PROF EV MASKx Register */
275 /*! @{ */
276 
277 #define PROFILER_PROF_EV_MASKX_PROF_MF0_MASK     (0xFFU)
278 #define PROFILER_PROF_EV_MASKX_PROF_MF0_SHIFT    (0U)
279 #define PROFILER_PROF_EV_MASKX_PROF_MF0_WIDTH    (8U)
280 #define PROFILER_PROF_EV_MASKX_PROF_MF0(x)       (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_EV_MASKX_PROF_MF0_SHIFT)) & PROFILER_PROF_EV_MASKX_PROF_MF0_MASK)
281 
282 #define PROFILER_PROF_EV_MASKX_PROF_MF1_MASK     (0xFF00U)
283 #define PROFILER_PROF_EV_MASKX_PROF_MF1_SHIFT    (8U)
284 #define PROFILER_PROF_EV_MASKX_PROF_MF1_WIDTH    (8U)
285 #define PROFILER_PROF_EV_MASKX_PROF_MF1(x)       (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_EV_MASKX_PROF_MF1_SHIFT)) & PROFILER_PROF_EV_MASKX_PROF_MF1_MASK)
286 
287 #define PROFILER_PROF_EV_MASKX_PROF_MF2_MASK     (0xF0000U)
288 #define PROFILER_PROF_EV_MASKX_PROF_MF2_SHIFT    (16U)
289 #define PROFILER_PROF_EV_MASKX_PROF_MF2_WIDTH    (4U)
290 #define PROFILER_PROF_EV_MASKX_PROF_MF2(x)       (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_EV_MASKX_PROF_MF2_SHIFT)) & PROFILER_PROF_EV_MASKX_PROF_MF2_MASK)
291 
292 #define PROFILER_PROF_EV_MASKX_PROF_MF3_MASK     (0xF00000U)
293 #define PROFILER_PROF_EV_MASKX_PROF_MF3_SHIFT    (20U)
294 #define PROFILER_PROF_EV_MASKX_PROF_MF3_WIDTH    (4U)
295 #define PROFILER_PROF_EV_MASKX_PROF_MF3(x)       (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_EV_MASKX_PROF_MF3_SHIFT)) & PROFILER_PROF_EV_MASKX_PROF_MF3_MASK)
296 
297 #define PROFILER_PROF_EV_MASKX_PROF_MF4_MASK     (0xF000000U)
298 #define PROFILER_PROF_EV_MASKX_PROF_MF4_SHIFT    (24U)
299 #define PROFILER_PROF_EV_MASKX_PROF_MF4_WIDTH    (4U)
300 #define PROFILER_PROF_EV_MASKX_PROF_MF4(x)       (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_EV_MASKX_PROF_MF4_SHIFT)) & PROFILER_PROF_EV_MASKX_PROF_MF4_MASK)
301 
302 #define PROFILER_PROF_EV_MASKX_PROF_MF5_MASK     (0xF0000000U)
303 #define PROFILER_PROF_EV_MASKX_PROF_MF5_SHIFT    (28U)
304 #define PROFILER_PROF_EV_MASKX_PROF_MF5_WIDTH    (4U)
305 #define PROFILER_PROF_EV_MASKX_PROF_MF5(x)       (((uint32_t)(((uint32_t)(x)) << PROFILER_PROF_EV_MASKX_PROF_MF5_SHIFT)) & PROFILER_PROF_EV_MASKX_PROF_MF5_MASK)
306 /*! @} */
307 
308 /*!
309  * @}
310  */ /* end of group PROFILER_Register_Masks */
311 
312 /*!
313  * @}
314  */ /* end of group PROFILER_Peripheral_Access_Layer */
315 
316 #endif  /* #if !defined(S32Z2_PROFILER_H_) */
317