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Searched refs:PM_RESOURCE_OFF (Results 1 – 22 of 22) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MCXN947/
Dfsl_pm_device.h195 #define PM_RESC_RAMA0_8K_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_SRAM_RAMA0_8K)
199 #define PM_RESC_RAMA1_8K_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_SRAM_RAMA1_8K)
203 #define PM_RESC_RAMA2_8K_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_SRAM_RAMA2_8K)
207 #define PM_RESC_RAMA3_8K_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_SRAM_RAMA3_8K)
214 #define PM_RESC_RAMX0_32K_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_SRAM_RAMX0_32K)
218 #define PM_RESC_RAMX1_32K_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_SRAM_RAMX1_32K)
222 #define PM_RESC_RAMX2_32K_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_SRAM_RAMX2_32K)
226 #define PM_RESC_RAMB0_32K_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_SRAM_RAMB0_32K)
230 #define PM_RESC_RAMC0_32K_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_SRAM_RAMC0_32K)
234 #define PM_RESC_RAMC1_32K_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_SRAM_RAMC1_32K)
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Dfsl_pm_device.c232 [kResc_Flash] = {PM_RESOURCE_OFF, PlaceHolderOperateMode},
233 [kResc_DCDC_CORE] = {PM_RESOURCE_OFF, PlaceHolderOperateMode},
234 [kResc_LDO_CORE] = {PM_RESOURCE_OFF, PlaceHolderOperateMode},
235 [kResc_LDO_SYS] = {PM_RESOURCE_OFF, PlaceHolderOperateMode},
236 [kResc_FRO_144M] = {PM_RESOURCE_OFF, PlaceHolderOperateMode},
237 [kResc_FRO_12M] = {PM_RESOURCE_OFF, PlaceHolderOperateMode},
238 [kResc_FRO_16K] = {PM_RESOURCE_OFF, PlaceHolderOperateMode},
239 [kResc_OSC_RTC] = {PM_RESOURCE_OFF, PlaceHolderOperateMode},
240 [kResc_OSC_SYS] = {PM_RESOURCE_OFF, PlaceHolderOperateMode},
241 [kResc_PLL0] = {PM_RESOURCE_OFF, PlaceHolderOperateMode},
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/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1171/
Dfsl_pm_device.h127 #define PM_RESC_CORE_DOMAIN_SUSPEND PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_CPU_PLATFORM)
135 #define PM_RESC_OSC_RC_16M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_16M)
143 #define PM_RESC_OSC_RC_48M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_48M)
151 #define PM_RESC_OSC_RC_48M_DIV2_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_48M_DIV2)
159 #define PM_RESC_OSC_RC_400M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_400M)
167 #define PM_RESC_OSC_RC_24M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_24M)
175 #define PM_RESC_OSC_RC_24M_CLK_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_24M_CLK)
183 #define PM_RESC_ARM_PLL_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_ARM_PLL)
191 #define PM_RESC_ARM_PLL_CLK_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_ARM_PLL_CLK)
199 #define PM_RESC_SYS_PLL2_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_SYS_PLL2)
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Dfsl_pm_device.c1456 case PM_RESOURCE_OFF: in PM_DEV_EnterPowerState()
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1172/
Dfsl_pm_device.h127 #define PM_RESC_CORE_DOMAIN_SUSPEND PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_CPU_PLATFORM)
135 #define PM_RESC_OSC_RC_16M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_16M)
143 #define PM_RESC_OSC_RC_48M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_48M)
151 #define PM_RESC_OSC_RC_48M_DIV2_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_48M_DIV2)
159 #define PM_RESC_OSC_RC_400M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_400M)
167 #define PM_RESC_OSC_RC_24M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_24M)
175 #define PM_RESC_OSC_RC_24M_CLK_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_24M_CLK)
183 #define PM_RESC_ARM_PLL_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_ARM_PLL)
191 #define PM_RESC_ARM_PLL_CLK_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_ARM_PLL_CLK)
199 #define PM_RESC_SYS_PLL2_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_SYS_PLL2)
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Dfsl_pm_device.c1456 case PM_RESOURCE_OFF: in PM_DEV_EnterPowerState()
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1173/
Dfsl_pm_device.h127 #define PM_RESC_CORE_DOMAIN_SUSPEND PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_CPU_PLATFORM)
135 #define PM_RESC_OSC_RC_16M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_16M)
143 #define PM_RESC_OSC_RC_48M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_48M)
151 #define PM_RESC_OSC_RC_48M_DIV2_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_48M_DIV2)
159 #define PM_RESC_OSC_RC_400M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_400M)
167 #define PM_RESC_OSC_RC_24M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_24M)
175 #define PM_RESC_OSC_RC_24M_CLK_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_24M_CLK)
183 #define PM_RESC_ARM_PLL_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_ARM_PLL)
191 #define PM_RESC_ARM_PLL_CLK_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_ARM_PLL_CLK)
199 #define PM_RESC_SYS_PLL2_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_SYS_PLL2)
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Dfsl_pm_device.c1456 case PM_RESOURCE_OFF: in PM_DEV_EnterPowerState()
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1176/
Dfsl_pm_device.h127 #define PM_RESC_CORE_DOMAIN_SUSPEND PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_CPU_PLATFORM)
135 #define PM_RESC_OSC_RC_16M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_16M)
143 #define PM_RESC_OSC_RC_48M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_48M)
151 #define PM_RESC_OSC_RC_48M_DIV2_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_48M_DIV2)
159 #define PM_RESC_OSC_RC_400M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_400M)
167 #define PM_RESC_OSC_RC_24M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_24M)
175 #define PM_RESC_OSC_RC_24M_CLK_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_24M_CLK)
183 #define PM_RESC_ARM_PLL_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_ARM_PLL)
191 #define PM_RESC_ARM_PLL_CLK_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_ARM_PLL_CLK)
199 #define PM_RESC_SYS_PLL2_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_SYS_PLL2)
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Dfsl_pm_device.c1456 case PM_RESOURCE_OFF: in PM_DEV_EnterPowerState()
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1175/
Dfsl_pm_device.h127 #define PM_RESC_CORE_DOMAIN_SUSPEND PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_CPU_PLATFORM)
135 #define PM_RESC_OSC_RC_16M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_16M)
143 #define PM_RESC_OSC_RC_48M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_48M)
151 #define PM_RESC_OSC_RC_48M_DIV2_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_48M_DIV2)
159 #define PM_RESC_OSC_RC_400M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_RC_400M)
167 #define PM_RESC_OSC_RC_24M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_24M)
175 #define PM_RESC_OSC_RC_24M_CLK_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_OSC_24M_CLK)
183 #define PM_RESC_ARM_PLL_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_ARM_PLL)
191 #define PM_RESC_ARM_PLL_CLK_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_ARM_PLL_CLK)
199 #define PM_RESC_SYS_PLL2_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, kResc_SYS_PLL2)
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Dfsl_pm_device.c1456 case PM_RESOURCE_OFF: in PM_DEV_EnterPowerState()
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MCXW716C/
Dfsl_pm_device.h62 #define PM_RESC_CTCM0_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 0U);
76 #define PM_RESC_CTCM1_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 1U);
89 #define PM_RESC_STCM0_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 2U);
102 #define PM_RESC_STCM1_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 3U)
115 #define PM_RESC_STCM2_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 4U)
128 #define PM_RESC_STCM3_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 5U)
141 #define PM_RESC_STCM4_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 6U)
150 #define PM_RESC_FRO_192M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 7U)
159 #define PM_RESC_FRO_6M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 8U)
Dfsl_pm_device.c159 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
160 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
161 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
162 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
163 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
164 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
165 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
166 {PM_RESOURCE_OFF, 0U, PM_DEV_SetFro192MOperateMode},
167 {PM_RESOURCE_OFF, 0U, PM_DEV_SetFro6MOperateMode},
241 resourceDB[9].currentOperateMode = PM_RESOURCE_OFF; in PM_DEV_EnterLowPowerMode()
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/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/KW45B41Z83/
Dfsl_pm_device.h62 #define PM_RESC_CTCM0_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 0U);
76 #define PM_RESC_CTCM1_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 1U);
89 #define PM_RESC_STCM0_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 2U);
102 #define PM_RESC_STCM1_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 3U)
115 #define PM_RESC_STCM2_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 4U)
128 #define PM_RESC_STCM3_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 5U)
141 #define PM_RESC_STCM4_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 6U)
150 #define PM_RESC_FRO_192M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 7U)
159 #define PM_RESC_FRO_6M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 8U)
Dfsl_pm_device.c159 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
160 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
161 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
162 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
163 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
164 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
165 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
166 {PM_RESOURCE_OFF, 0U, PM_DEV_SetFro192MOperateMode},
167 {PM_RESOURCE_OFF, 0U, PM_DEV_SetFro6MOperateMode},
241 resourceDB[9].currentOperateMode = PM_RESOURCE_OFF; in PM_DEV_EnterLowPowerMode()
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/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MCXW716A/
Dfsl_pm_device.h62 #define PM_RESC_CTCM0_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 0U);
76 #define PM_RESC_CTCM1_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 1U);
89 #define PM_RESC_STCM0_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 2U);
102 #define PM_RESC_STCM1_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 3U)
115 #define PM_RESC_STCM2_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 4U)
128 #define PM_RESC_STCM3_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 5U)
141 #define PM_RESC_STCM4_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 6U)
150 #define PM_RESC_FRO_192M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 7U)
159 #define PM_RESC_FRO_6M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 8U)
Dfsl_pm_device.c159 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
160 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
161 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
162 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
163 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
164 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
165 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
166 {PM_RESOURCE_OFF, 0U, PM_DEV_SetFro192MOperateMode},
167 {PM_RESOURCE_OFF, 0U, PM_DEV_SetFro6MOperateMode},
241 resourceDB[9].currentOperateMode = PM_RESOURCE_OFF; in PM_DEV_EnterLowPowerMode()
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/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/K32W1480/
Dfsl_pm_device.h62 #define PM_RESC_CTCM0_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 0U);
76 #define PM_RESC_CTCM1_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 1U);
89 #define PM_RESC_STCM0_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 2U);
102 #define PM_RESC_STCM1_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 3U)
115 #define PM_RESC_STCM2_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 4U)
128 #define PM_RESC_STCM3_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 5U)
141 #define PM_RESC_STCM4_POWEROFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 6U)
150 #define PM_RESC_FRO_192M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 7U)
159 #define PM_RESC_FRO_6M_OFF PM_ENCODE_RESC(PM_RESOURCE_OFF, 8U)
Dfsl_pm_device.c159 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
160 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
161 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
162 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
163 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
164 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
165 {PM_RESOURCE_OFF, 0U, PM_DEV_SetRAMOperateMode},
166 {PM_RESOURCE_OFF, 0U, PM_DEV_SetFro192MOperateMode},
167 {PM_RESOURCE_OFF, 0U, PM_DEV_SetFro6MOperateMode},
241 resourceDB[9].currentOperateMode = PM_RESOURCE_OFF; in PM_DEV_EnterLowPowerMode()
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/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/core/
Dfsl_pm_config.h50 #define PM_RESOURCE_OFF (0U) macro
Dfsl_pm_core.c808 if (opMode != PM_RESOURCE_OFF) in PM_SetConstraints()