Searched refs:PMU_REG_LPSR_1P0_CLR_RSVD1_MASK (Results 1 – 1 of 1) sorted by relevance
32916 #define PMU_REG_LPSR_1P0_CLR_RSVD1_MASK 0xFF000000u macro32918 … (((uint32_t)(((uint32_t)(x))<<PMU_REG_LPSR_1P0_CLR_RSVD1_SHIFT))&PMU_REG_LPSR_1P0_CLR_RSVD1_MASK)