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Searched refs:PMU_REG_1P1_ENABLE_BO_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/drivers/pmu/
Dfsl_pmu.h238 base->REG_1P1 |= PMU_REG_1P1_ENABLE_BO_MASK; in PMU_1P1EnableBrownout()
242 base->REG_1P1 &= ~PMU_REG_1P1_ENABLE_BO_MASK; in PMU_1P1EnableBrownout()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h22488 #define PMU_REG_1P1_ENABLE_BO_MASK (0x2U) macro
22490 … (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_BO_SHIFT)) & PMU_REG_1P1_ENABLE_BO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h25098 #define PMU_REG_1P1_ENABLE_BO_MASK (0x2U) macro
25100 … (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_BO_SHIFT)) & PMU_REG_1P1_ENABLE_BO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h29141 #define PMU_REG_1P1_ENABLE_BO_MASK (0x2U) macro
29143 … (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_BO_SHIFT)) & PMU_REG_1P1_ENABLE_BO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h29162 #define PMU_REG_1P1_ENABLE_BO_MASK (0x2U) macro
29164 … (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_BO_SHIFT)) & PMU_REG_1P1_ENABLE_BO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h30213 #define PMU_REG_1P1_ENABLE_BO_MASK (0x2U) macro
30215 … (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_BO_SHIFT)) & PMU_REG_1P1_ENABLE_BO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h31610 #define PMU_REG_1P1_ENABLE_BO_MASK (0x2U) macro
31612 … (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_BO_SHIFT)) & PMU_REG_1P1_ENABLE_BO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h32920 #define PMU_REG_1P1_ENABLE_BO_MASK (0x2U) macro
32922 … (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_BO_SHIFT)) & PMU_REG_1P1_ENABLE_BO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h33461 #define PMU_REG_1P1_ENABLE_BO_MASK (0x2U) macro
33463 … (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_BO_SHIFT)) & PMU_REG_1P1_ENABLE_BO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h32352 #define PMU_REG_1P1_ENABLE_BO_MASK (0x2U) macro
32354 … (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_BO_SHIFT)) & PMU_REG_1P1_ENABLE_BO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h34994 #define PMU_REG_1P1_ENABLE_BO_MASK (0x2U) macro
34996 … (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_BO_SHIFT)) & PMU_REG_1P1_ENABLE_BO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h34987 #define PMU_REG_1P1_ENABLE_BO_MASK (0x2U) macro
34989 … (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_BO_SHIFT)) & PMU_REG_1P1_ENABLE_BO_MASK)
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h28642 #define PMU_REG_1P1_ENABLE_BO_MASK 0x2u macro