Searched refs:PMU_MISC2_TOG_REG2_ENABLE_BO_MASK (Results 1 – 12 of 12) sorted by relevance
24554 #define PMU_MISC2_TOG_REG2_ENABLE_BO_MASK (0x200000U) macro24556 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG2_ENABLE_BO_MASK)
27164 #define PMU_MISC2_TOG_REG2_ENABLE_BO_MASK (0x200000U) macro27166 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG2_ENABLE_BO_MASK)
31207 #define PMU_MISC2_TOG_REG2_ENABLE_BO_MASK (0x200000U) macro31209 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG2_ENABLE_BO_MASK)
31228 #define PMU_MISC2_TOG_REG2_ENABLE_BO_MASK (0x200000U) macro31230 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG2_ENABLE_BO_MASK)
32601 #define PMU_MISC2_TOG_REG2_ENABLE_BO_MASK (0x200000U) macro32603 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG2_ENABLE_BO_MASK)
33990 #define PMU_MISC2_TOG_REG2_ENABLE_BO_MASK (0x200000U) macro33992 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG2_ENABLE_BO_MASK)
35308 #define PMU_MISC2_TOG_REG2_ENABLE_BO_MASK (0x200000U) macro35310 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG2_ENABLE_BO_MASK)
35841 #define PMU_MISC2_TOG_REG2_ENABLE_BO_MASK (0x200000U) macro35843 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG2_ENABLE_BO_MASK)
34740 #define PMU_MISC2_TOG_REG2_ENABLE_BO_MASK (0x200000U) macro34742 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG2_ENABLE_BO_MASK)
37382 #define PMU_MISC2_TOG_REG2_ENABLE_BO_MASK (0x200000U) macro37384 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG2_ENABLE_BO_MASK)
37375 #define PMU_MISC2_TOG_REG2_ENABLE_BO_MASK (0x200000U) macro37377 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG2_ENABLE_BO_MASK)
29016 #define PMU_MISC2_TOG_REG2_ENABLE_BO_MASK 0x200000u macro
