Searched refs:PMU_MISC2_TOG_REG2_BO_STATUS_MASK (Results 1 – 12 of 12) sorted by relevance
24550 #define PMU_MISC2_TOG_REG2_BO_STATUS_MASK (0x80000U) macro24552 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG2_BO_STATUS_MASK)
27160 #define PMU_MISC2_TOG_REG2_BO_STATUS_MASK (0x80000U) macro27162 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG2_BO_STATUS_MASK)
31203 #define PMU_MISC2_TOG_REG2_BO_STATUS_MASK (0x80000U) macro31205 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG2_BO_STATUS_MASK)
31224 #define PMU_MISC2_TOG_REG2_BO_STATUS_MASK (0x80000U) macro31226 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG2_BO_STATUS_MASK)
32597 #define PMU_MISC2_TOG_REG2_BO_STATUS_MASK (0x80000U) macro32599 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG2_BO_STATUS_MASK)
33986 #define PMU_MISC2_TOG_REG2_BO_STATUS_MASK (0x80000U) macro33988 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG2_BO_STATUS_MASK)
35304 #define PMU_MISC2_TOG_REG2_BO_STATUS_MASK (0x80000U) macro35306 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG2_BO_STATUS_MASK)
35837 #define PMU_MISC2_TOG_REG2_BO_STATUS_MASK (0x80000U) macro35839 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG2_BO_STATUS_MASK)
34736 #define PMU_MISC2_TOG_REG2_BO_STATUS_MASK (0x80000U) macro34738 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG2_BO_STATUS_MASK)
37378 #define PMU_MISC2_TOG_REG2_BO_STATUS_MASK (0x80000U) macro37380 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG2_BO_STATUS_MASK)
37371 #define PMU_MISC2_TOG_REG2_BO_STATUS_MASK (0x80000U) macro37373 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG2_BO_STATUS_MASK)
29014 #define PMU_MISC2_TOG_REG2_BO_STATUS_MASK 0x80000u macro
