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Searched refs:PMU_MISC2_TOG_REG2_BO_OFFSET_MASK (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h24542 #define PMU_MISC2_TOG_REG2_BO_OFFSET_MASK (0x70000U) macro
24548 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG2_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h27152 #define PMU_MISC2_TOG_REG2_BO_OFFSET_MASK (0x70000U) macro
27158 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG2_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h31195 #define PMU_MISC2_TOG_REG2_BO_OFFSET_MASK (0x70000U) macro
31201 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG2_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h31216 #define PMU_MISC2_TOG_REG2_BO_OFFSET_MASK (0x70000U) macro
31222 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG2_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h32589 #define PMU_MISC2_TOG_REG2_BO_OFFSET_MASK (0x70000U) macro
32595 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG2_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h33978 #define PMU_MISC2_TOG_REG2_BO_OFFSET_MASK (0x70000U) macro
33984 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG2_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h35296 #define PMU_MISC2_TOG_REG2_BO_OFFSET_MASK (0x70000U) macro
35302 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG2_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h35829 #define PMU_MISC2_TOG_REG2_BO_OFFSET_MASK (0x70000U) macro
35835 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG2_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h34728 #define PMU_MISC2_TOG_REG2_BO_OFFSET_MASK (0x70000U) macro
34734 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG2_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h37370 #define PMU_MISC2_TOG_REG2_BO_OFFSET_MASK (0x70000U) macro
37376 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG2_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h37363 #define PMU_MISC2_TOG_REG2_BO_OFFSET_MASK (0x70000U) macro
37369 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG2_BO_OFFSET_MASK)
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h29011 #define PMU_MISC2_TOG_REG2_BO_OFFSET_MASK 0x70000u macro
29013 …(uint32_t)(((uint32_t)(x))<<PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT))&PMU_MISC2_TOG_REG2_BO_OFFSET_MASK)