Home
last modified time | relevance | path

Searched refs:PMU_MISC2_TOG_REG0_BO_OFFSET_MASK (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h24492 #define PMU_MISC2_TOG_REG0_BO_OFFSET_MASK (0x7U) macro
24498 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG0_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h27102 #define PMU_MISC2_TOG_REG0_BO_OFFSET_MASK (0x7U) macro
27108 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG0_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h31145 #define PMU_MISC2_TOG_REG0_BO_OFFSET_MASK (0x7U) macro
31151 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG0_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h31166 #define PMU_MISC2_TOG_REG0_BO_OFFSET_MASK (0x7U) macro
31172 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG0_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h32539 #define PMU_MISC2_TOG_REG0_BO_OFFSET_MASK (0x7U) macro
32545 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG0_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h33928 #define PMU_MISC2_TOG_REG0_BO_OFFSET_MASK (0x7U) macro
33934 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG0_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h35246 #define PMU_MISC2_TOG_REG0_BO_OFFSET_MASK (0x7U) macro
35252 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG0_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h35779 #define PMU_MISC2_TOG_REG0_BO_OFFSET_MASK (0x7U) macro
35785 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG0_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h34678 #define PMU_MISC2_TOG_REG0_BO_OFFSET_MASK (0x7U) macro
34684 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG0_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h37320 #define PMU_MISC2_TOG_REG0_BO_OFFSET_MASK (0x7U) macro
37326 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG0_BO_OFFSET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h37313 #define PMU_MISC2_TOG_REG0_BO_OFFSET_MASK (0x7U) macro
37319 …t32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG0_BO_OFFSET_MASK)
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h28993 #define PMU_MISC2_TOG_REG0_BO_OFFSET_MASK 0x7u macro
28995 …(uint32_t)(((uint32_t)(x))<<PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT))&PMU_MISC2_TOG_REG0_BO_OFFSET_MASK)