Searched refs:PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK (Results 1 – 8 of 8) sorted by relevance
32098 #define PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK (0x3E0U) macro32123 …int32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK)
33488 #define PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK (0x3E0U) macro33512 …int32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK)
34805 #define PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK (0x3E0U) macro34830 …int32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK)
35339 #define PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK (0x3E0U) macro35363 …int32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK)
34237 #define PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK (0x3E0U) macro34262 …int32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK)
36879 #define PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK (0x3E0U) macro36904 …int32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK)
36872 #define PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK (0x3E0U) macro36897 …int32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK)
28841 #define PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK 0x3E0u macro28843 …(((uint32_t)(((uint32_t)(x))<<PMU_MISC1_TOG_LVDS2_CLK_SEL_SHIFT))&PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK)
