Searched refs:PMU_MISC1_IRQ_TEMPLOW_MASK (Results 1 – 12 of 12) sorted by relevance
24040 #define PMU_MISC1_IRQ_TEMPLOW_MASK (0x10000000U) macro24042 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_IRQ_TEMPLOW_MASK)
26650 #define PMU_MISC1_IRQ_TEMPLOW_MASK (0x10000000U) macro26652 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_IRQ_TEMPLOW_MASK)
30693 #define PMU_MISC1_IRQ_TEMPLOW_MASK (0x10000000U) macro30695 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_IRQ_TEMPLOW_MASK)
30714 #define PMU_MISC1_IRQ_TEMPLOW_MASK (0x10000000U) macro30716 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_IRQ_TEMPLOW_MASK)
31862 #define PMU_MISC1_IRQ_TEMPLOW_MASK (0x10000000U) macro31864 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_IRQ_TEMPLOW_MASK)
33257 #define PMU_MISC1_IRQ_TEMPLOW_MASK (0x10000000U) macro33259 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_IRQ_TEMPLOW_MASK)
34569 #define PMU_MISC1_IRQ_TEMPLOW_MASK (0x10000000U) macro34571 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_IRQ_TEMPLOW_MASK)
35108 #define PMU_MISC1_IRQ_TEMPLOW_MASK (0x10000000U) macro35110 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_IRQ_TEMPLOW_MASK)
34001 #define PMU_MISC1_IRQ_TEMPLOW_MASK (0x10000000U) macro34003 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_IRQ_TEMPLOW_MASK)
36643 #define PMU_MISC1_IRQ_TEMPLOW_MASK (0x10000000U) macro36645 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_IRQ_TEMPLOW_MASK)
36636 #define PMU_MISC1_IRQ_TEMPLOW_MASK (0x10000000U) macro36638 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_IRQ_TEMPLOW_MASK)
28771 #define PMU_MISC1_IRQ_TEMPLOW_MASK 0x10000000u macro
