Searched refs:PMU_MISC1_CLR_IRQ_DIG_BO_MASK (Results 1 – 12 of 12) sorted by relevance
24116 #define PMU_MISC1_CLR_IRQ_DIG_BO_MASK (0x80000000U) macro24118 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_DIG_BO_MASK)
26726 #define PMU_MISC1_CLR_IRQ_DIG_BO_MASK (0x80000000U) macro26728 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_DIG_BO_MASK)
30769 #define PMU_MISC1_CLR_IRQ_DIG_BO_MASK (0x80000000U) macro30771 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_DIG_BO_MASK)
30790 #define PMU_MISC1_CLR_IRQ_DIG_BO_MASK (0x80000000U) macro30792 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_DIG_BO_MASK)
32068 #define PMU_MISC1_CLR_IRQ_DIG_BO_MASK (0x80000000U) macro32070 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_DIG_BO_MASK)
33459 #define PMU_MISC1_CLR_IRQ_DIG_BO_MASK (0x80000000U) macro33461 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_DIG_BO_MASK)
34775 #define PMU_MISC1_CLR_IRQ_DIG_BO_MASK (0x80000000U) macro34777 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_DIG_BO_MASK)
35310 #define PMU_MISC1_CLR_IRQ_DIG_BO_MASK (0x80000000U) macro35312 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_DIG_BO_MASK)
34207 #define PMU_MISC1_CLR_IRQ_DIG_BO_MASK (0x80000000U) macro34209 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_DIG_BO_MASK)
36849 #define PMU_MISC1_CLR_IRQ_DIG_BO_MASK (0x80000000U) macro36851 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_DIG_BO_MASK)
36842 #define PMU_MISC1_CLR_IRQ_DIG_BO_MASK (0x80000000U) macro36844 … (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_DIG_BO_MASK)
28835 #define PMU_MISC1_CLR_IRQ_DIG_BO_MASK 0x80000000u macro
