1 /*
2  * Copyright 1997-2016 Freescale Semiconductor, Inc.
3  * Copyright 2016-2024 NXP
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 /*!
9  * @file S32Z2_PMC.h
10  * @version 2.3
11  * @date 2024-05-03
12  * @brief Peripheral Access Layer for S32Z2_PMC
13  *
14  * This file contains register definitions and macros for easy access to their
15  * bit fields.
16  *
17  * This file assumes LITTLE endian system.
18  */
19 
20 /**
21 * @page misra_violations MISRA-C:2012 violations
22 *
23 * @section [global]
24 * Violates MISRA 2012 Advisory Rule 2.3, local typedef not referenced
25 * The SoC header defines typedef for all modules.
26 *
27 * @section [global]
28 * Violates MISRA 2012 Advisory Rule 2.5, local macro not referenced
29 * The SoC header defines macros for all modules and registers.
30 *
31 * @section [global]
32 * Violates MISRA 2012 Advisory Directive 4.9, Function-like macro
33 * These are generated macros used for accessing the bit-fields from registers.
34 *
35 * @section [global]
36 * Violates MISRA 2012 Required Rule 5.1, identifier clash
37 * The supported compilers use more than 31 significant characters for identifiers.
38 *
39 * @section [global]
40 * Violates MISRA 2012 Required Rule 5.2, identifier clash
41 * The supported compilers use more than 31 significant characters for identifiers.
42 *
43 * @section [global]
44 * Violates MISRA 2012 Required Rule 5.4, identifier clash
45 * The supported compilers use more than 31 significant characters for identifiers.
46 *
47 * @section [global]
48 * Violates MISRA 2012 Required Rule 5.5, identifier clash
49 * The supported compilers use more than 31 significant characters for identifiers.
50 *
51 * @section [global]
52 * Violates MISRA 2012 Required Rule 21.1, defined macro '__I' is reserved to the compiler
53 * This type qualifier is needed to ensure correct I/O access and addressing.
54 */
55 
56 /* Prevention from multiple including the same memory map */
57 #if !defined(S32Z2_PMC_H_)  /* Check if memory map has not been already included */
58 #define S32Z2_PMC_H_
59 
60 #include "S32Z2_COMMON.h"
61 
62 /* ----------------------------------------------------------------------------
63    -- PMC Peripheral Access Layer
64    ---------------------------------------------------------------------------- */
65 
66 /*!
67  * @addtogroup PMC_Peripheral_Access_Layer PMC Peripheral Access Layer
68  * @{
69  */
70 
71 /** PMC - Size of Registers Arrays */
72 #define PMC_POR_WDOG_EVENT_CAPTURE_COUNT          3u
73 
74 /** PMC - Register Layout Typedef */
75 typedef struct {
76   __IO uint32_t SSR;                               /**< Source of System Reset, offset: 0x0 */
77   __IO uint32_t NCSPD_CTL;                         /**< Non-Critical Supply Presence Detector Control, offset: 0x4 */
78   uint8_t RESERVED_0[4];
79   __I  uint32_t NCSPD_STAT;                        /**< NCSPD Status Register, offset: 0xC */
80   __IO uint32_t CSPD_EVENT_CAPTURE;                /**< CSPD Event Capture (CSPDEF), offset: 0x10 */
81   __IO uint32_t NCSPD_EVENT_CAPTURE;               /**< NCSPD Event Flag (NCSPDEF), offset: 0x14 */
82   uint8_t RESERVED_1[4];
83   __IO uint32_t POR_WDOG_EVENT_CAPTURE[PMC_POR_WDOG_EVENT_CAPTURE_COUNT]; /**< Device Status Flag (DSF0)..Device Status Flag (DSF2), array offset: 0x1C, array step: 0x4 */
84 } PMC_Type, *PMC_MemMapPtr;
85 
86 /** Number of instances of the PMC module. */
87 #define PMC_INSTANCE_COUNT                       (1u)
88 
89 /* PMC - Peripheral instance base addresses */
90 /** Peripheral PMC base address */
91 #define IP_PMC_BASE                              (0x40250000u)
92 /** Peripheral PMC base pointer */
93 #define IP_PMC                                   ((PMC_Type *)IP_PMC_BASE)
94 /** Array initializer of PMC peripheral base addresses */
95 #define IP_PMC_BASE_ADDRS                        { IP_PMC_BASE }
96 /** Array initializer of PMC peripheral base pointers */
97 #define IP_PMC_BASE_PTRS                         { IP_PMC }
98 
99 /* ----------------------------------------------------------------------------
100    -- PMC Register Masks
101    ---------------------------------------------------------------------------- */
102 
103 /*!
104  * @addtogroup PMC_Register_Masks PMC Register Masks
105  * @{
106  */
107 
108 /*! @name SSR - Source of System Reset */
109 /*! @{ */
110 
111 #define PMC_SSR_POR_SUP_MASK                     (0x1U)
112 #define PMC_SSR_POR_SUP_SHIFT                    (0U)
113 #define PMC_SSR_POR_SUP_WIDTH                    (1U)
114 #define PMC_SSR_POR_SUP(x)                       (((uint32_t)(((uint32_t)(x)) << PMC_SSR_POR_SUP_SHIFT)) & PMC_SSR_POR_SUP_MASK)
115 
116 #define PMC_SSR_CSPD_EVENT_MASK                  (0x2U)
117 #define PMC_SSR_CSPD_EVENT_SHIFT                 (1U)
118 #define PMC_SSR_CSPD_EVENT_WIDTH                 (1U)
119 #define PMC_SSR_CSPD_EVENT(x)                    (((uint32_t)(((uint32_t)(x)) << PMC_SSR_CSPD_EVENT_SHIFT)) & PMC_SSR_CSPD_EVENT_MASK)
120 
121 #define PMC_SSR_POR_WDOG_EVENT_MASK              (0x4U)
122 #define PMC_SSR_POR_WDOG_EVENT_SHIFT             (2U)
123 #define PMC_SSR_POR_WDOG_EVENT_WIDTH             (1U)
124 #define PMC_SSR_POR_WDOG_EVENT(x)                (((uint32_t)(((uint32_t)(x)) << PMC_SSR_POR_WDOG_EVENT_SHIFT)) & PMC_SSR_POR_WDOG_EVENT_MASK)
125 /*! @} */
126 
127 /*! @name NCSPD_CTL - Non-Critical Supply Presence Detector Control */
128 /*! @{ */
129 
130 #define PMC_NCSPD_CTL_NCSPD_CTL0_MASK            (0x1U)
131 #define PMC_NCSPD_CTL_NCSPD_CTL0_SHIFT           (0U)
132 #define PMC_NCSPD_CTL_NCSPD_CTL0_WIDTH           (1U)
133 #define PMC_NCSPD_CTL_NCSPD_CTL0(x)              (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL0_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL0_MASK)
134 
135 #define PMC_NCSPD_CTL_NCSPD_CTL1_MASK            (0x2U)
136 #define PMC_NCSPD_CTL_NCSPD_CTL1_SHIFT           (1U)
137 #define PMC_NCSPD_CTL_NCSPD_CTL1_WIDTH           (1U)
138 #define PMC_NCSPD_CTL_NCSPD_CTL1(x)              (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL1_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL1_MASK)
139 
140 #define PMC_NCSPD_CTL_NCSPD_CTL2_MASK            (0x4U)
141 #define PMC_NCSPD_CTL_NCSPD_CTL2_SHIFT           (2U)
142 #define PMC_NCSPD_CTL_NCSPD_CTL2_WIDTH           (1U)
143 #define PMC_NCSPD_CTL_NCSPD_CTL2(x)              (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL2_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL2_MASK)
144 
145 #define PMC_NCSPD_CTL_NCSPD_CTL3_MASK            (0x8U)
146 #define PMC_NCSPD_CTL_NCSPD_CTL3_SHIFT           (3U)
147 #define PMC_NCSPD_CTL_NCSPD_CTL3_WIDTH           (1U)
148 #define PMC_NCSPD_CTL_NCSPD_CTL3(x)              (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL3_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL3_MASK)
149 
150 #define PMC_NCSPD_CTL_NCSPD_CTL4_MASK            (0x10U)
151 #define PMC_NCSPD_CTL_NCSPD_CTL4_SHIFT           (4U)
152 #define PMC_NCSPD_CTL_NCSPD_CTL4_WIDTH           (1U)
153 #define PMC_NCSPD_CTL_NCSPD_CTL4(x)              (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL4_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL4_MASK)
154 
155 #define PMC_NCSPD_CTL_NCSPD_CTL5_MASK            (0x20U)
156 #define PMC_NCSPD_CTL_NCSPD_CTL5_SHIFT           (5U)
157 #define PMC_NCSPD_CTL_NCSPD_CTL5_WIDTH           (1U)
158 #define PMC_NCSPD_CTL_NCSPD_CTL5(x)              (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL5_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL5_MASK)
159 
160 #define PMC_NCSPD_CTL_NCSPD_CTL6_MASK            (0x40U)
161 #define PMC_NCSPD_CTL_NCSPD_CTL6_SHIFT           (6U)
162 #define PMC_NCSPD_CTL_NCSPD_CTL6_WIDTH           (1U)
163 #define PMC_NCSPD_CTL_NCSPD_CTL6(x)              (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL6_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL6_MASK)
164 
165 #define PMC_NCSPD_CTL_NCSPD_CTL7_MASK            (0x80U)
166 #define PMC_NCSPD_CTL_NCSPD_CTL7_SHIFT           (7U)
167 #define PMC_NCSPD_CTL_NCSPD_CTL7_WIDTH           (1U)
168 #define PMC_NCSPD_CTL_NCSPD_CTL7(x)              (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL7_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL7_MASK)
169 
170 #define PMC_NCSPD_CTL_NCSPD_CTL8_MASK            (0x100U)
171 #define PMC_NCSPD_CTL_NCSPD_CTL8_SHIFT           (8U)
172 #define PMC_NCSPD_CTL_NCSPD_CTL8_WIDTH           (1U)
173 #define PMC_NCSPD_CTL_NCSPD_CTL8(x)              (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL8_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL8_MASK)
174 
175 #define PMC_NCSPD_CTL_NCSPD_CTL9_MASK            (0x200U)
176 #define PMC_NCSPD_CTL_NCSPD_CTL9_SHIFT           (9U)
177 #define PMC_NCSPD_CTL_NCSPD_CTL9_WIDTH           (1U)
178 #define PMC_NCSPD_CTL_NCSPD_CTL9(x)              (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL9_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL9_MASK)
179 
180 #define PMC_NCSPD_CTL_NCSPD_CTL10_MASK           (0x400U)
181 #define PMC_NCSPD_CTL_NCSPD_CTL10_SHIFT          (10U)
182 #define PMC_NCSPD_CTL_NCSPD_CTL10_WIDTH          (1U)
183 #define PMC_NCSPD_CTL_NCSPD_CTL10(x)             (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL10_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL10_MASK)
184 
185 #define PMC_NCSPD_CTL_NCSPD_CTL11_MASK           (0x800U)
186 #define PMC_NCSPD_CTL_NCSPD_CTL11_SHIFT          (11U)
187 #define PMC_NCSPD_CTL_NCSPD_CTL11_WIDTH          (1U)
188 #define PMC_NCSPD_CTL_NCSPD_CTL11(x)             (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL11_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL11_MASK)
189 
190 #define PMC_NCSPD_CTL_NCSPD_CTL12_MASK           (0x1000U)
191 #define PMC_NCSPD_CTL_NCSPD_CTL12_SHIFT          (12U)
192 #define PMC_NCSPD_CTL_NCSPD_CTL12_WIDTH          (1U)
193 #define PMC_NCSPD_CTL_NCSPD_CTL12(x)             (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL12_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL12_MASK)
194 
195 #define PMC_NCSPD_CTL_NCSPD_CTL13_MASK           (0x2000U)
196 #define PMC_NCSPD_CTL_NCSPD_CTL13_SHIFT          (13U)
197 #define PMC_NCSPD_CTL_NCSPD_CTL13_WIDTH          (1U)
198 #define PMC_NCSPD_CTL_NCSPD_CTL13(x)             (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL13_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL13_MASK)
199 
200 #define PMC_NCSPD_CTL_NCSPD_CTL14_MASK           (0x4000U)
201 #define PMC_NCSPD_CTL_NCSPD_CTL14_SHIFT          (14U)
202 #define PMC_NCSPD_CTL_NCSPD_CTL14_WIDTH          (1U)
203 #define PMC_NCSPD_CTL_NCSPD_CTL14(x)             (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL14_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL14_MASK)
204 
205 #define PMC_NCSPD_CTL_NCSPD_CTL15_MASK           (0x8000U)
206 #define PMC_NCSPD_CTL_NCSPD_CTL15_SHIFT          (15U)
207 #define PMC_NCSPD_CTL_NCSPD_CTL15_WIDTH          (1U)
208 #define PMC_NCSPD_CTL_NCSPD_CTL15(x)             (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL15_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL15_MASK)
209 
210 #define PMC_NCSPD_CTL_NCSPD_CTL16_MASK           (0x10000U)
211 #define PMC_NCSPD_CTL_NCSPD_CTL16_SHIFT          (16U)
212 #define PMC_NCSPD_CTL_NCSPD_CTL16_WIDTH          (1U)
213 #define PMC_NCSPD_CTL_NCSPD_CTL16(x)             (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL16_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL16_MASK)
214 
215 #define PMC_NCSPD_CTL_NCSPD_CTL17_MASK           (0x20000U)
216 #define PMC_NCSPD_CTL_NCSPD_CTL17_SHIFT          (17U)
217 #define PMC_NCSPD_CTL_NCSPD_CTL17_WIDTH          (1U)
218 #define PMC_NCSPD_CTL_NCSPD_CTL17(x)             (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL17_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL17_MASK)
219 
220 #define PMC_NCSPD_CTL_NCSPD_CTL18_MASK           (0x40000U)
221 #define PMC_NCSPD_CTL_NCSPD_CTL18_SHIFT          (18U)
222 #define PMC_NCSPD_CTL_NCSPD_CTL18_WIDTH          (1U)
223 #define PMC_NCSPD_CTL_NCSPD_CTL18(x)             (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL18_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL18_MASK)
224 
225 #define PMC_NCSPD_CTL_NCSPD_CTL19_MASK           (0x80000U)
226 #define PMC_NCSPD_CTL_NCSPD_CTL19_SHIFT          (19U)
227 #define PMC_NCSPD_CTL_NCSPD_CTL19_WIDTH          (1U)
228 #define PMC_NCSPD_CTL_NCSPD_CTL19(x)             (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL19_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL19_MASK)
229 
230 #define PMC_NCSPD_CTL_NCSPD_CTL20_MASK           (0x100000U)
231 #define PMC_NCSPD_CTL_NCSPD_CTL20_SHIFT          (20U)
232 #define PMC_NCSPD_CTL_NCSPD_CTL20_WIDTH          (1U)
233 #define PMC_NCSPD_CTL_NCSPD_CTL20(x)             (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL20_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL20_MASK)
234 
235 #define PMC_NCSPD_CTL_NCSPD_CTL21_MASK           (0x200000U)
236 #define PMC_NCSPD_CTL_NCSPD_CTL21_SHIFT          (21U)
237 #define PMC_NCSPD_CTL_NCSPD_CTL21_WIDTH          (1U)
238 #define PMC_NCSPD_CTL_NCSPD_CTL21(x)             (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL21_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL21_MASK)
239 
240 #define PMC_NCSPD_CTL_NCSPD_CTL22_MASK           (0x400000U)
241 #define PMC_NCSPD_CTL_NCSPD_CTL22_SHIFT          (22U)
242 #define PMC_NCSPD_CTL_NCSPD_CTL22_WIDTH          (1U)
243 #define PMC_NCSPD_CTL_NCSPD_CTL22(x)             (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL22_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL22_MASK)
244 
245 #define PMC_NCSPD_CTL_NCSPD_CTL23_MASK           (0x800000U)
246 #define PMC_NCSPD_CTL_NCSPD_CTL23_SHIFT          (23U)
247 #define PMC_NCSPD_CTL_NCSPD_CTL23_WIDTH          (1U)
248 #define PMC_NCSPD_CTL_NCSPD_CTL23(x)             (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL23_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL23_MASK)
249 
250 #define PMC_NCSPD_CTL_NCSPD_CTL24_MASK           (0x1000000U)
251 #define PMC_NCSPD_CTL_NCSPD_CTL24_SHIFT          (24U)
252 #define PMC_NCSPD_CTL_NCSPD_CTL24_WIDTH          (1U)
253 #define PMC_NCSPD_CTL_NCSPD_CTL24(x)             (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL24_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL24_MASK)
254 
255 #define PMC_NCSPD_CTL_NCSPD_CTL25_MASK           (0x2000000U)
256 #define PMC_NCSPD_CTL_NCSPD_CTL25_SHIFT          (25U)
257 #define PMC_NCSPD_CTL_NCSPD_CTL25_WIDTH          (1U)
258 #define PMC_NCSPD_CTL_NCSPD_CTL25(x)             (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_CTL_NCSPD_CTL25_SHIFT)) & PMC_NCSPD_CTL_NCSPD_CTL25_MASK)
259 /*! @} */
260 
261 /*! @name NCSPD_STAT - NCSPD Status Register */
262 /*! @{ */
263 
264 #define PMC_NCSPD_STAT_NCSPD_STAT0_MASK          (0x1U)
265 #define PMC_NCSPD_STAT_NCSPD_STAT0_SHIFT         (0U)
266 #define PMC_NCSPD_STAT_NCSPD_STAT0_WIDTH         (1U)
267 #define PMC_NCSPD_STAT_NCSPD_STAT0(x)            (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT0_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT0_MASK)
268 
269 #define PMC_NCSPD_STAT_NCSPD_STAT1_MASK          (0x2U)
270 #define PMC_NCSPD_STAT_NCSPD_STAT1_SHIFT         (1U)
271 #define PMC_NCSPD_STAT_NCSPD_STAT1_WIDTH         (1U)
272 #define PMC_NCSPD_STAT_NCSPD_STAT1(x)            (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT1_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT1_MASK)
273 
274 #define PMC_NCSPD_STAT_NCSPD_STAT2_MASK          (0x4U)
275 #define PMC_NCSPD_STAT_NCSPD_STAT2_SHIFT         (2U)
276 #define PMC_NCSPD_STAT_NCSPD_STAT2_WIDTH         (1U)
277 #define PMC_NCSPD_STAT_NCSPD_STAT2(x)            (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT2_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT2_MASK)
278 
279 #define PMC_NCSPD_STAT_NCSPD_STAT3_MASK          (0x8U)
280 #define PMC_NCSPD_STAT_NCSPD_STAT3_SHIFT         (3U)
281 #define PMC_NCSPD_STAT_NCSPD_STAT3_WIDTH         (1U)
282 #define PMC_NCSPD_STAT_NCSPD_STAT3(x)            (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT3_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT3_MASK)
283 
284 #define PMC_NCSPD_STAT_NCSPD_STAT4_MASK          (0x10U)
285 #define PMC_NCSPD_STAT_NCSPD_STAT4_SHIFT         (4U)
286 #define PMC_NCSPD_STAT_NCSPD_STAT4_WIDTH         (1U)
287 #define PMC_NCSPD_STAT_NCSPD_STAT4(x)            (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT4_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT4_MASK)
288 
289 #define PMC_NCSPD_STAT_NCSPD_STAT5_MASK          (0x20U)
290 #define PMC_NCSPD_STAT_NCSPD_STAT5_SHIFT         (5U)
291 #define PMC_NCSPD_STAT_NCSPD_STAT5_WIDTH         (1U)
292 #define PMC_NCSPD_STAT_NCSPD_STAT5(x)            (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT5_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT5_MASK)
293 
294 #define PMC_NCSPD_STAT_NCSPD_STAT6_MASK          (0x40U)
295 #define PMC_NCSPD_STAT_NCSPD_STAT6_SHIFT         (6U)
296 #define PMC_NCSPD_STAT_NCSPD_STAT6_WIDTH         (1U)
297 #define PMC_NCSPD_STAT_NCSPD_STAT6(x)            (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT6_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT6_MASK)
298 
299 #define PMC_NCSPD_STAT_NCSPD_STAT7_MASK          (0x80U)
300 #define PMC_NCSPD_STAT_NCSPD_STAT7_SHIFT         (7U)
301 #define PMC_NCSPD_STAT_NCSPD_STAT7_WIDTH         (1U)
302 #define PMC_NCSPD_STAT_NCSPD_STAT7(x)            (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT7_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT7_MASK)
303 
304 #define PMC_NCSPD_STAT_NCSPD_STAT8_MASK          (0x100U)
305 #define PMC_NCSPD_STAT_NCSPD_STAT8_SHIFT         (8U)
306 #define PMC_NCSPD_STAT_NCSPD_STAT8_WIDTH         (1U)
307 #define PMC_NCSPD_STAT_NCSPD_STAT8(x)            (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT8_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT8_MASK)
308 
309 #define PMC_NCSPD_STAT_NCSPD_STAT9_MASK          (0x200U)
310 #define PMC_NCSPD_STAT_NCSPD_STAT9_SHIFT         (9U)
311 #define PMC_NCSPD_STAT_NCSPD_STAT9_WIDTH         (1U)
312 #define PMC_NCSPD_STAT_NCSPD_STAT9(x)            (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT9_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT9_MASK)
313 
314 #define PMC_NCSPD_STAT_NCSPD_STAT10_MASK         (0x400U)
315 #define PMC_NCSPD_STAT_NCSPD_STAT10_SHIFT        (10U)
316 #define PMC_NCSPD_STAT_NCSPD_STAT10_WIDTH        (1U)
317 #define PMC_NCSPD_STAT_NCSPD_STAT10(x)           (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT10_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT10_MASK)
318 
319 #define PMC_NCSPD_STAT_NCSPD_STAT11_MASK         (0x800U)
320 #define PMC_NCSPD_STAT_NCSPD_STAT11_SHIFT        (11U)
321 #define PMC_NCSPD_STAT_NCSPD_STAT11_WIDTH        (1U)
322 #define PMC_NCSPD_STAT_NCSPD_STAT11(x)           (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT11_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT11_MASK)
323 
324 #define PMC_NCSPD_STAT_NCSPD_STAT12_MASK         (0x1000U)
325 #define PMC_NCSPD_STAT_NCSPD_STAT12_SHIFT        (12U)
326 #define PMC_NCSPD_STAT_NCSPD_STAT12_WIDTH        (1U)
327 #define PMC_NCSPD_STAT_NCSPD_STAT12(x)           (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT12_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT12_MASK)
328 
329 #define PMC_NCSPD_STAT_NCSPD_STAT13_MASK         (0x2000U)
330 #define PMC_NCSPD_STAT_NCSPD_STAT13_SHIFT        (13U)
331 #define PMC_NCSPD_STAT_NCSPD_STAT13_WIDTH        (1U)
332 #define PMC_NCSPD_STAT_NCSPD_STAT13(x)           (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT13_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT13_MASK)
333 
334 #define PMC_NCSPD_STAT_NCSPD_STAT14_MASK         (0x4000U)
335 #define PMC_NCSPD_STAT_NCSPD_STAT14_SHIFT        (14U)
336 #define PMC_NCSPD_STAT_NCSPD_STAT14_WIDTH        (1U)
337 #define PMC_NCSPD_STAT_NCSPD_STAT14(x)           (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT14_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT14_MASK)
338 
339 #define PMC_NCSPD_STAT_NCSPD_STAT15_MASK         (0x8000U)
340 #define PMC_NCSPD_STAT_NCSPD_STAT15_SHIFT        (15U)
341 #define PMC_NCSPD_STAT_NCSPD_STAT15_WIDTH        (1U)
342 #define PMC_NCSPD_STAT_NCSPD_STAT15(x)           (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT15_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT15_MASK)
343 
344 #define PMC_NCSPD_STAT_NCSPD_STAT16_MASK         (0x10000U)
345 #define PMC_NCSPD_STAT_NCSPD_STAT16_SHIFT        (16U)
346 #define PMC_NCSPD_STAT_NCSPD_STAT16_WIDTH        (1U)
347 #define PMC_NCSPD_STAT_NCSPD_STAT16(x)           (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT16_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT16_MASK)
348 
349 #define PMC_NCSPD_STAT_NCSPD_STAT17_MASK         (0x20000U)
350 #define PMC_NCSPD_STAT_NCSPD_STAT17_SHIFT        (17U)
351 #define PMC_NCSPD_STAT_NCSPD_STAT17_WIDTH        (1U)
352 #define PMC_NCSPD_STAT_NCSPD_STAT17(x)           (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT17_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT17_MASK)
353 
354 #define PMC_NCSPD_STAT_NCSPD_STAT18_MASK         (0x40000U)
355 #define PMC_NCSPD_STAT_NCSPD_STAT18_SHIFT        (18U)
356 #define PMC_NCSPD_STAT_NCSPD_STAT18_WIDTH        (1U)
357 #define PMC_NCSPD_STAT_NCSPD_STAT18(x)           (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT18_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT18_MASK)
358 
359 #define PMC_NCSPD_STAT_NCSPD_STAT19_MASK         (0x80000U)
360 #define PMC_NCSPD_STAT_NCSPD_STAT19_SHIFT        (19U)
361 #define PMC_NCSPD_STAT_NCSPD_STAT19_WIDTH        (1U)
362 #define PMC_NCSPD_STAT_NCSPD_STAT19(x)           (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT19_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT19_MASK)
363 
364 #define PMC_NCSPD_STAT_NCSPD_STAT20_MASK         (0x100000U)
365 #define PMC_NCSPD_STAT_NCSPD_STAT20_SHIFT        (20U)
366 #define PMC_NCSPD_STAT_NCSPD_STAT20_WIDTH        (1U)
367 #define PMC_NCSPD_STAT_NCSPD_STAT20(x)           (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT20_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT20_MASK)
368 
369 #define PMC_NCSPD_STAT_NCSPD_STAT21_MASK         (0x200000U)
370 #define PMC_NCSPD_STAT_NCSPD_STAT21_SHIFT        (21U)
371 #define PMC_NCSPD_STAT_NCSPD_STAT21_WIDTH        (1U)
372 #define PMC_NCSPD_STAT_NCSPD_STAT21(x)           (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT21_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT21_MASK)
373 
374 #define PMC_NCSPD_STAT_NCSPD_STAT22_MASK         (0x400000U)
375 #define PMC_NCSPD_STAT_NCSPD_STAT22_SHIFT        (22U)
376 #define PMC_NCSPD_STAT_NCSPD_STAT22_WIDTH        (1U)
377 #define PMC_NCSPD_STAT_NCSPD_STAT22(x)           (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT22_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT22_MASK)
378 
379 #define PMC_NCSPD_STAT_NCSPD_STAT23_MASK         (0x800000U)
380 #define PMC_NCSPD_STAT_NCSPD_STAT23_SHIFT        (23U)
381 #define PMC_NCSPD_STAT_NCSPD_STAT23_WIDTH        (1U)
382 #define PMC_NCSPD_STAT_NCSPD_STAT23(x)           (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT23_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT23_MASK)
383 
384 #define PMC_NCSPD_STAT_NCSPD_STAT24_MASK         (0x1000000U)
385 #define PMC_NCSPD_STAT_NCSPD_STAT24_SHIFT        (24U)
386 #define PMC_NCSPD_STAT_NCSPD_STAT24_WIDTH        (1U)
387 #define PMC_NCSPD_STAT_NCSPD_STAT24(x)           (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT24_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT24_MASK)
388 
389 #define PMC_NCSPD_STAT_NCSPD_STAT25_MASK         (0x2000000U)
390 #define PMC_NCSPD_STAT_NCSPD_STAT25_SHIFT        (25U)
391 #define PMC_NCSPD_STAT_NCSPD_STAT25_WIDTH        (1U)
392 #define PMC_NCSPD_STAT_NCSPD_STAT25(x)           (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_STAT_NCSPD_STAT25_SHIFT)) & PMC_NCSPD_STAT_NCSPD_STAT25_MASK)
393 /*! @} */
394 
395 /*! @name CSPD_EVENT_CAPTURE - CSPD Event Capture (CSPDEF) */
396 /*! @{ */
397 
398 #define PMC_CSPD_EVENT_CAPTURE_HVCPOREF_MASK     (0x1U)
399 #define PMC_CSPD_EVENT_CAPTURE_HVCPOREF_SHIFT    (0U)
400 #define PMC_CSPD_EVENT_CAPTURE_HVCPOREF_WIDTH    (1U)
401 #define PMC_CSPD_EVENT_CAPTURE_HVCPOREF(x)       (((uint32_t)(((uint32_t)(x)) << PMC_CSPD_EVENT_CAPTURE_HVCPOREF_SHIFT)) & PMC_CSPD_EVENT_CAPTURE_HVCPOREF_MASK)
402 
403 #define PMC_CSPD_EVENT_CAPTURE_CSPD_EVENT_CAPTURE0_MASK (0x2U)
404 #define PMC_CSPD_EVENT_CAPTURE_CSPD_EVENT_CAPTURE0_SHIFT (1U)
405 #define PMC_CSPD_EVENT_CAPTURE_CSPD_EVENT_CAPTURE0_WIDTH (1U)
406 #define PMC_CSPD_EVENT_CAPTURE_CSPD_EVENT_CAPTURE0(x) (((uint32_t)(((uint32_t)(x)) << PMC_CSPD_EVENT_CAPTURE_CSPD_EVENT_CAPTURE0_SHIFT)) & PMC_CSPD_EVENT_CAPTURE_CSPD_EVENT_CAPTURE0_MASK)
407 
408 #define PMC_CSPD_EVENT_CAPTURE_CSPD_EVENT_CAPTURE1_MASK (0x4U)
409 #define PMC_CSPD_EVENT_CAPTURE_CSPD_EVENT_CAPTURE1_SHIFT (2U)
410 #define PMC_CSPD_EVENT_CAPTURE_CSPD_EVENT_CAPTURE1_WIDTH (1U)
411 #define PMC_CSPD_EVENT_CAPTURE_CSPD_EVENT_CAPTURE1(x) (((uint32_t)(((uint32_t)(x)) << PMC_CSPD_EVENT_CAPTURE_CSPD_EVENT_CAPTURE1_SHIFT)) & PMC_CSPD_EVENT_CAPTURE_CSPD_EVENT_CAPTURE1_MASK)
412 
413 #define PMC_CSPD_EVENT_CAPTURE_CSPD_EVENT_CAPTURE2_MASK (0x8U)
414 #define PMC_CSPD_EVENT_CAPTURE_CSPD_EVENT_CAPTURE2_SHIFT (3U)
415 #define PMC_CSPD_EVENT_CAPTURE_CSPD_EVENT_CAPTURE2_WIDTH (1U)
416 #define PMC_CSPD_EVENT_CAPTURE_CSPD_EVENT_CAPTURE2(x) (((uint32_t)(((uint32_t)(x)) << PMC_CSPD_EVENT_CAPTURE_CSPD_EVENT_CAPTURE2_SHIFT)) & PMC_CSPD_EVENT_CAPTURE_CSPD_EVENT_CAPTURE2_MASK)
417 /*! @} */
418 
419 /*! @name NCSPD_EVENT_CAPTURE - NCSPD Event Flag (NCSPDEF) */
420 /*! @{ */
421 
422 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE0_MASK (0x1U)
423 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE0_SHIFT (0U)
424 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE0_WIDTH (1U)
425 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE0(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE0_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE0_MASK)
426 
427 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE1_MASK (0x2U)
428 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE1_SHIFT (1U)
429 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE1_WIDTH (1U)
430 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE1(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE1_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE1_MASK)
431 
432 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE2_MASK (0x4U)
433 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE2_SHIFT (2U)
434 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE2_WIDTH (1U)
435 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE2(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE2_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE2_MASK)
436 
437 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE3_MASK (0x8U)
438 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE3_SHIFT (3U)
439 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE3_WIDTH (1U)
440 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE3(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE3_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE3_MASK)
441 
442 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE4_MASK (0x10U)
443 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE4_SHIFT (4U)
444 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE4_WIDTH (1U)
445 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE4(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE4_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE4_MASK)
446 
447 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE5_MASK (0x20U)
448 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE5_SHIFT (5U)
449 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE5_WIDTH (1U)
450 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE5(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE5_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE5_MASK)
451 
452 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE6_MASK (0x40U)
453 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE6_SHIFT (6U)
454 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE6_WIDTH (1U)
455 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE6(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE6_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE6_MASK)
456 
457 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE7_MASK (0x80U)
458 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE7_SHIFT (7U)
459 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE7_WIDTH (1U)
460 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE7(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE7_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE7_MASK)
461 
462 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE8_MASK (0x100U)
463 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE8_SHIFT (8U)
464 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE8_WIDTH (1U)
465 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE8(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE8_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE8_MASK)
466 
467 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE9_MASK (0x200U)
468 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE9_SHIFT (9U)
469 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE9_WIDTH (1U)
470 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE9(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE9_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE9_MASK)
471 
472 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE10_MASK (0x400U)
473 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE10_SHIFT (10U)
474 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE10_WIDTH (1U)
475 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE10(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE10_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE10_MASK)
476 
477 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE11_MASK (0x800U)
478 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE11_SHIFT (11U)
479 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE11_WIDTH (1U)
480 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE11(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE11_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE11_MASK)
481 
482 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE12_MASK (0x1000U)
483 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE12_SHIFT (12U)
484 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE12_WIDTH (1U)
485 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE12(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE12_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE12_MASK)
486 
487 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE13_MASK (0x2000U)
488 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE13_SHIFT (13U)
489 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE13_WIDTH (1U)
490 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE13(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE13_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE13_MASK)
491 
492 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE14_MASK (0x4000U)
493 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE14_SHIFT (14U)
494 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE14_WIDTH (1U)
495 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE14(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE14_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE14_MASK)
496 
497 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE15_MASK (0x8000U)
498 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE15_SHIFT (15U)
499 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE15_WIDTH (1U)
500 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE15(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE15_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE15_MASK)
501 
502 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE16_MASK (0x10000U)
503 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE16_SHIFT (16U)
504 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE16_WIDTH (1U)
505 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE16(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE16_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE16_MASK)
506 
507 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE17_MASK (0x20000U)
508 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE17_SHIFT (17U)
509 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE17_WIDTH (1U)
510 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE17(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE17_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE17_MASK)
511 
512 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE18_MASK (0x40000U)
513 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE18_SHIFT (18U)
514 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE18_WIDTH (1U)
515 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE18(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE18_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE18_MASK)
516 
517 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE19_MASK (0x80000U)
518 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE19_SHIFT (19U)
519 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE19_WIDTH (1U)
520 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE19(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE19_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE19_MASK)
521 
522 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE20_MASK (0x100000U)
523 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE20_SHIFT (20U)
524 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE20_WIDTH (1U)
525 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE20(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE20_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE20_MASK)
526 
527 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE21_MASK (0x200000U)
528 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE21_SHIFT (21U)
529 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE21_WIDTH (1U)
530 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE21(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE21_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE21_MASK)
531 
532 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE22_MASK (0x400000U)
533 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE22_SHIFT (22U)
534 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE22_WIDTH (1U)
535 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE22(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE22_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE22_MASK)
536 
537 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE23_MASK (0x800000U)
538 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE23_SHIFT (23U)
539 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE23_WIDTH (1U)
540 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE23(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE23_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE23_MASK)
541 
542 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE24_MASK (0x1000000U)
543 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE24_SHIFT (24U)
544 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE24_WIDTH (1U)
545 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE24(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE24_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE24_MASK)
546 
547 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE25_MASK (0x2000000U)
548 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE25_SHIFT (25U)
549 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE25_WIDTH (1U)
550 #define PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE25(x) (((uint32_t)(((uint32_t)(x)) << PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE25_SHIFT)) & PMC_NCSPD_EVENT_CAPTURE_NCSPD_EVENT_CAPTURE25_MASK)
551 /*! @} */
552 
553 /*! @name POR_WDOG_EVENT_CAPTURE - Device Status Flag (DSF0)..Device Status Flag (DSF2) */
554 /*! @{ */
555 
556 #define PMC_POR_WDOG_EVENT_CAPTURE_DSFBIT0_MASK  (0xFFFFFFFFU)
557 #define PMC_POR_WDOG_EVENT_CAPTURE_DSFBIT0_SHIFT (0U)
558 #define PMC_POR_WDOG_EVENT_CAPTURE_DSFBIT0_WIDTH (32U)
559 #define PMC_POR_WDOG_EVENT_CAPTURE_DSFBIT0(x)    (((uint32_t)(((uint32_t)(x)) << PMC_POR_WDOG_EVENT_CAPTURE_DSFBIT0_SHIFT)) & PMC_POR_WDOG_EVENT_CAPTURE_DSFBIT0_MASK)
560 
561 #define PMC_POR_WDOG_EVENT_CAPTURE_DSFBIT1_MASK  (0xFFFFFFFFU)
562 #define PMC_POR_WDOG_EVENT_CAPTURE_DSFBIT1_SHIFT (0U)
563 #define PMC_POR_WDOG_EVENT_CAPTURE_DSFBIT1_WIDTH (32U)
564 #define PMC_POR_WDOG_EVENT_CAPTURE_DSFBIT1(x)    (((uint32_t)(((uint32_t)(x)) << PMC_POR_WDOG_EVENT_CAPTURE_DSFBIT1_SHIFT)) & PMC_POR_WDOG_EVENT_CAPTURE_DSFBIT1_MASK)
565 
566 #define PMC_POR_WDOG_EVENT_CAPTURE_DSFBIT2_MASK  (0xFFFFFFFFU)
567 #define PMC_POR_WDOG_EVENT_CAPTURE_DSFBIT2_SHIFT (0U)
568 #define PMC_POR_WDOG_EVENT_CAPTURE_DSFBIT2_WIDTH (32U)
569 #define PMC_POR_WDOG_EVENT_CAPTURE_DSFBIT2(x)    (((uint32_t)(((uint32_t)(x)) << PMC_POR_WDOG_EVENT_CAPTURE_DSFBIT2_SHIFT)) & PMC_POR_WDOG_EVENT_CAPTURE_DSFBIT2_MASK)
570 /*! @} */
571 
572 /*!
573  * @}
574  */ /* end of group PMC_Register_Masks */
575 
576 /*!
577  * @}
578  */ /* end of group PMC_Peripheral_Access_Layer */
579 
580 #endif  /* #if !defined(S32Z2_PMC_H_) */
581