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Searched refs:PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h38929 #define PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK (0x800U) macro
38935 …int32_t)(((uint32_t)(x)) << PMC_PDSLEEPCFG5_CPU0_SCACHE_SHIFT)) & PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK)
DMIMXRT735S_cm33_core1.h38989 #define PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK (0x800U) macro
38995 …int32_t)(((uint32_t)(x)) << PMC_PDSLEEPCFG5_CPU0_SCACHE_SHIFT)) & PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK)
DMIMXRT735S_ezhv.h54696 #define PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK (0x800U) macro
54702 …int32_t)(((uint32_t)(x)) << PMC_PDSLEEPCFG5_CPU0_SCACHE_SHIFT)) & PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK)
DMIMXRT735S_cm33_core0.h54743 #define PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK (0x800U) macro
54749 …int32_t)(((uint32_t)(x)) << PMC_PDSLEEPCFG5_CPU0_SCACHE_SHIFT)) & PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h41786 #define PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK (0x800U) macro
41792 …int32_t)(((uint32_t)(x)) << PMC_PDSLEEPCFG5_CPU0_SCACHE_SHIFT)) & PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK)
DMIMXRT758S_hifi1.h41724 #define PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK (0x800U) macro
41730 …int32_t)(((uint32_t)(x)) << PMC_PDSLEEPCFG5_CPU0_SCACHE_SHIFT)) & PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK)
DMIMXRT758S_cm33_core0.h57542 #define PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK (0x800U) macro
57548 …int32_t)(((uint32_t)(x)) << PMC_PDSLEEPCFG5_CPU0_SCACHE_SHIFT)) & PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK)
DMIMXRT758S_ezhv.h57434 #define PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK (0x800U) macro
57440 …int32_t)(((uint32_t)(x)) << PMC_PDSLEEPCFG5_CPU0_SCACHE_SHIFT)) & PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h41724 #define PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK (0x800U) macro
41730 …int32_t)(((uint32_t)(x)) << PMC_PDSLEEPCFG5_CPU0_SCACHE_SHIFT)) & PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK)
DMIMXRT798S_cm33_core1.h41786 #define PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK (0x800U) macro
41792 …int32_t)(((uint32_t)(x)) << PMC_PDSLEEPCFG5_CPU0_SCACHE_SHIFT)) & PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK)
DMIMXRT798S_hifi4.h57457 #define PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK (0x800U) macro
57463 …int32_t)(((uint32_t)(x)) << PMC_PDSLEEPCFG5_CPU0_SCACHE_SHIFT)) & PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK)
DMIMXRT798S_cm33_core0.h57542 #define PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK (0x800U) macro
57548 …int32_t)(((uint32_t)(x)) << PMC_PDSLEEPCFG5_CPU0_SCACHE_SHIFT)) & PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK)
DMIMXRT798S_ezhv.h57458 #define PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK (0x800U) macro
57464 …int32_t)(((uint32_t)(x)) << PMC_PDSLEEPCFG5_CPU0_SCACHE_SHIFT)) & PMC_PDSLEEPCFG5_CPU0_SCACHE_MASK)