Searched refs:PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK (Results 1 – 13 of 13) sorted by relevance
39229 #define PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK (0x40000000U) macro39235 …int32_t)(((uint32_t)(x)) << PMC_PDCFGSTATUS0_AFBBSR1_PD_SHIFT)) & PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK)
39289 #define PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK (0x40000000U) macro39295 …int32_t)(((uint32_t)(x)) << PMC_PDCFGSTATUS0_AFBBSR1_PD_SHIFT)) & PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK)
54996 #define PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK (0x40000000U) macro55002 …int32_t)(((uint32_t)(x)) << PMC_PDCFGSTATUS0_AFBBSR1_PD_SHIFT)) & PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK)
55043 #define PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK (0x40000000U) macro55049 …int32_t)(((uint32_t)(x)) << PMC_PDCFGSTATUS0_AFBBSR1_PD_SHIFT)) & PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK)
42086 #define PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK (0x40000000U) macro42092 …int32_t)(((uint32_t)(x)) << PMC_PDCFGSTATUS0_AFBBSR1_PD_SHIFT)) & PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK)
42024 #define PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK (0x40000000U) macro42030 …int32_t)(((uint32_t)(x)) << PMC_PDCFGSTATUS0_AFBBSR1_PD_SHIFT)) & PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK)
57842 #define PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK (0x40000000U) macro57848 …int32_t)(((uint32_t)(x)) << PMC_PDCFGSTATUS0_AFBBSR1_PD_SHIFT)) & PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK)
57734 #define PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK (0x40000000U) macro57740 …int32_t)(((uint32_t)(x)) << PMC_PDCFGSTATUS0_AFBBSR1_PD_SHIFT)) & PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK)
57757 #define PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK (0x40000000U) macro57763 …int32_t)(((uint32_t)(x)) << PMC_PDCFGSTATUS0_AFBBSR1_PD_SHIFT)) & PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK)
57758 #define PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK (0x40000000U) macro57764 …int32_t)(((uint32_t)(x)) << PMC_PDCFGSTATUS0_AFBBSR1_PD_SHIFT)) & PMC_PDCFGSTATUS0_AFBBSR1_PD_MASK)
