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Searched refs:PLL_AUDIO_CTRL (Results 1 – 25 of 45) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1181/drivers/
Dfsl_clock.c714 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
718 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
726 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
730 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
760 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
791 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
1648 ANADIG_PLL->PLL_AUDIO_CTRL = in CLOCK_SetClockSourceControlMode()
1649 … (ANADIG_PLL->PLL_AUDIO_CTRL & ~(ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK)) | in CLOCK_SetClockSourceControlMode()
Dfsl_clock.h1691 return (bool)((ANADIG_PLL->PLL_AUDIO_CTRL & ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK) >> in CLOCK_IsPllEnabled()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/drivers/
Dfsl_clock.c714 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
718 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
726 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
730 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
760 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
791 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
1648 ANADIG_PLL->PLL_AUDIO_CTRL = in CLOCK_SetClockSourceControlMode()
1649 … (ANADIG_PLL->PLL_AUDIO_CTRL & ~(ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK)) | in CLOCK_SetClockSourceControlMode()
Dfsl_clock.h1691 return (bool)((ANADIG_PLL->PLL_AUDIO_CTRL & ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK) >> in CLOCK_IsPllEnabled()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1182/drivers/
Dfsl_clock.c714 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
718 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
726 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
730 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
760 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
791 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
1648 ANADIG_PLL->PLL_AUDIO_CTRL = in CLOCK_SetClockSourceControlMode()
1649 … (ANADIG_PLL->PLL_AUDIO_CTRL & ~(ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK)) | in CLOCK_SetClockSourceControlMode()
Dfsl_clock.h1691 return (bool)((ANADIG_PLL->PLL_AUDIO_CTRL & ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK) >> in CLOCK_IsPllEnabled()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/drivers/
Dfsl_clock.c714 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
718 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
726 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
730 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
760 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
791 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
1648 ANADIG_PLL->PLL_AUDIO_CTRL = in CLOCK_SetClockSourceControlMode()
1649 … (ANADIG_PLL->PLL_AUDIO_CTRL & ~(ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK)) | in CLOCK_SetClockSourceControlMode()
Dfsl_clock.h1691 return (bool)((ANADIG_PLL->PLL_AUDIO_CTRL & ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK) >> in CLOCK_IsPllEnabled()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_clock.c704 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
708 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
716 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
720 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
750 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
781 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
817 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK; in CLOCK_GPC_SetAudioPllOutputFreq()
Dfsl_clock.h2248 return (bool)((ANADIG_PLL->PLL_AUDIO_CTRL & ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK) >> in CLOCK_IsPllEnabled()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_clock.c704 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
708 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
716 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
720 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
750 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
781 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
817 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK; in CLOCK_GPC_SetAudioPllOutputFreq()
Dfsl_clock.h2248 return (bool)((ANADIG_PLL->PLL_AUDIO_CTRL & ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK) >> in CLOCK_IsPllEnabled()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_clock.c710 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
714 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
722 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
726 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
756 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
787 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
823 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK; in CLOCK_GPC_SetAudioPllOutputFreq()
Dfsl_clock.h2215 return (bool)((ANADIG_PLL->PLL_AUDIO_CTRL & ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK) >> in CLOCK_IsPllEnabled()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_clock.c704 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
708 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
716 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
720 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
750 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
781 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
817 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK; in CLOCK_GPC_SetAudioPllOutputFreq()
Dfsl_clock.h2248 return (bool)((ANADIG_PLL->PLL_AUDIO_CTRL & ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK) >> in CLOCK_IsPllEnabled()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_clock.c704 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
708 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
716 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
720 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
750 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
781 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
817 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK; in CLOCK_GPC_SetAudioPllOutputFreq()
Dfsl_clock.h2248 return (bool)((ANADIG_PLL->PLL_AUDIO_CTRL & ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK) >> in CLOCK_IsPllEnabled()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_clock.c704 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
708 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
716 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
720 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
750 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
781 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
817 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK; in CLOCK_GPC_SetAudioPllOutputFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_clock.c710 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
714 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_GATE_MASK; in ANATOP_AudioPllGate()
722 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
726 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_ENABLE_CLK_MASK; in ANATOP_AudioPllSwEnClk()
756 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
787 reg = ANADIG_PLL->PLL_AUDIO_CTRL; in CLOCK_InitAudioPll()
823 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK; in CLOCK_GPC_SetAudioPllOutputFreq()
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1175/
Dfsl_pm_device.c895 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK; in PM_DEV_SetClockSourcesControlBySetpoint()
943 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK; in PM_DEV_SetClockSourcesControlBySetpoint()
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1171/
Dfsl_pm_device.c895 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK; in PM_DEV_SetClockSourcesControlBySetpoint()
943 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK; in PM_DEV_SetClockSourcesControlBySetpoint()
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1172/
Dfsl_pm_device.c895 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK; in PM_DEV_SetClockSourcesControlBySetpoint()
943 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK; in PM_DEV_SetClockSourcesControlBySetpoint()
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1176/
Dfsl_pm_device.c895 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK; in PM_DEV_SetClockSourcesControlBySetpoint()
943 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK; in PM_DEV_SetClockSourcesControlBySetpoint()
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1173/
Dfsl_pm_device.c895 ANADIG_PLL->PLL_AUDIO_CTRL &= ~ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK; in PM_DEV_SetClockSourcesControlBySetpoint()
943 ANADIG_PLL->PLL_AUDIO_CTRL |= ANADIG_PLL_PLL_AUDIO_CTRL_PLL_AUDIO_CONTROL_MODE_MASK; in PM_DEV_SetClockSourcesControlBySetpoint()

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