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Searched refs:PLLDIG_PLLCR_PLLPD_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Specific.c196 if ((IP_CORE_PLL->PLLCR & PLLDIG_PLLCR_PLLPD_MASK) != 0U) /* if CORE_PLL is not enabled */ in Clock_Ip_SpecificPlatformInitClock()
204 …IP_CORE_PLL->PLLCR &= ~PLLDIG_PLLCR_PLLPD_MASK; /* Start CORE_PLL */ in Clock_Ip_SpecificPlatformInitClock()
207 … if ((IP_PERIPH_PLL->PLLCR & PLLDIG_PLLCR_PLLPD_MASK) != 0U) /* if PERIPH_PLL is not enabled */ in Clock_Ip_SpecificPlatformInitClock()
215 …IP_PERIPH_PLL->PLLCR &= ~PLLDIG_PLLCR_PLLPD_MASK; /* Start PERIPH_P… in Clock_Ip_SpecificPlatformInitClock()
240 if ((IP_CORE_PLL->PLLCR & PLLDIG_PLLCR_PLLPD_MASK) != 0U) /* if CORE_PLL is not enabled */ in Clock_Ip_SpecificPlatformInitClock()
248 …IP_CORE_PLL->PLLCR &= ~PLLDIG_PLLCR_PLLPD_MASK; /* Start CORE_PLL */ in Clock_Ip_SpecificPlatformInitClock()
263 … if ((IP_PERIPH_PLL->PLLCR & PLLDIG_PLLCR_PLLPD_MASK) != 0U) /* if PERIPH_PLL is not enabled */ in Clock_Ip_SpecificPlatformInitClock()
271 …IP_PERIPH_PLL->PLLCR &= ~PLLDIG_PLLCR_PLLPD_MASK; /* Start PERIPH_P… in Clock_Ip_SpecificPlatformInitClock()
DClock_Ip_Pll.c182 Clock_Ip_apxPll[Instance].PllInstance->PLLCR |= PLLDIG_PLLCR_PLLPD_MASK; in Clock_Ip_ResetPlldigRdivMfiMfnSdmenSsscgbypSpreadctlStepnoStepsize()
255 if (0U == (Clock_Ip_apxPll[Instance].PllInstance->PLLCR & PLLDIG_PLLCR_PLLPD_MASK)) in Clock_Ip_CompletePlldigRdivMfiMfnSdmenSsscgbypSpreadctlStepnoStepsize()
292 Clock_Ip_apxPll[Instance].PllInstance->PLLCR &= ~PLLDIG_PLLCR_PLLPD_MASK; in Clock_Ip_EnablePlldigRdivMfiMfnSdmenSsscgbypSpreadctlStepnoStepsize()
325 Clock_Ip_apxPll[Instance].PllInstance->PLLCR |= PLLDIG_PLLCR_PLLPD_MASK; in Clock_Ip_ResetPlldigRdivMfiMfnSdmen()
390 if (0U == (Clock_Ip_apxPll[Instance].PllInstance->PLLCR & PLLDIG_PLLCR_PLLPD_MASK)) in Clock_Ip_CompletePlldigRdivMfiMfnSdmen()
426 Clock_Ip_apxPll[Instance].PllInstance->PLLCR &= ~PLLDIG_PLLCR_PLLPD_MASK; in Clock_Ip_EnablePlldigRdivMfiMfnSdmen()
/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_PLLDIG.h120 #define PLLDIG_PLLCR_PLLPD_MASK (0x80000000U) macro
123 … (((uint32_t)(((uint32_t)(x)) << PLLDIG_PLLCR_PLLPD_SHIFT)) & PLLDIG_PLLCR_PLLPD_MASK)