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Searched refs:PIT2_IRQn (Results 1 – 25 of 41) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_COMMON.h245 …PIT2_IRQn = 98, /**< Interrupt for Channel0,Interrupt for Channel… enumerator
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1173/
Dfsl_pm_device.h658 #define PM_WSID_PIT2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(PIT2_IRQn) /*!< PI…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1176/
Dfsl_pm_device.h658 #define PM_WSID_PIT2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(PIT2_IRQn) /*!< PI…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1172/
Dfsl_pm_device.h658 #define PM_WSID_PIT2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(PIT2_IRQn) /*!< PI…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1175/
Dfsl_pm_device.h658 #define PM_WSID_PIT2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(PIT2_IRQn) /*!< PI…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1171/
Dfsl_pm_device.h658 #define PM_WSID_PIT2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(PIT2_IRQn) /*!< PI…
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h182 PIT2_IRQn = 50, /**< PIT timer channel 2 interrupt */ enumerator
7471 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h182 PIT2_IRQn = 50, /**< PIT timer channel 2 interrupt */ enumerator
7476 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h183 PIT2_IRQn = 50, /**< PIT timer channel 2 interrupt */ enumerator
8110 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h185 PIT2_IRQn = 50, /**< PIT timer channel 2 interrupt */ enumerator
9007 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F51212/
DMKV31F51212.h185 PIT2_IRQn = 50, /**< PIT timer channel 2 interrupt */ enumerator
9253 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h185 PIT2_IRQn = 50, /**< PIT timer channel 2 interrupt */ enumerator
8849 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F25612/
DMK22F25612.h191 PIT2_IRQn = 50, /**< PIT timer channel 2 interrupt */ enumerator
9750 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW22D5/
DMKW22D5.h194 PIT2_IRQn = 50, /**< Periodic interrupt timer channel 2 */ enumerator
5532 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW24D5/
DMKW24D5.h194 PIT2_IRQn = 50, /**< Periodic interrupt timer channel 2 */ enumerator
5532 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F51212/
DMK22F51212.h201 PIT2_IRQn = 50, /**< PIT timer channel 2 interrupt */ enumerator
10006 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h203 PIT2_IRQn = 50, /**< PIT timer channel 2 interrupt */ enumerator
13283 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
/hal_nxp-latest/mcux/mcux-sdk/devices/MK24F12/
DMK24F12.h200 PIT2_IRQn = 50, /**< PIT timer channel 2 interrupt */ enumerator
16326 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
/hal_nxp-latest/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h195 PIT2_IRQn = 50, /**< PIT timer channel 2 interrupt */ enumerator
18111 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
/hal_nxp-latest/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h208 PIT2_IRQn = 50, /**< PIT timer channel 2 interrupt */ enumerator
18157 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h178 PIT2_IRQn = 50, /**< Periodic interrupt timer channel 2 */ enumerator
19401 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h178 PIT2_IRQn = 50, /**< Periodic interrupt timer channel 2 */ enumerator
21167 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
/hal_nxp-latest/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h188 PIT2_IRQn = 50, /**< PIT timer channel 2 interrupt */ enumerator
21848 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
/hal_nxp-latest/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h175 PIT2_IRQn = 50, /**< PIT timer channel 2 interrupt */ enumerator
20031 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
/hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h188 PIT2_IRQn = 50, /**< PIT timer channel 2 interrupt */ enumerator
21848 #define PIT_IRQS { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }

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