Home
last modified time | relevance | path

Searched refs:PHY_Write (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/components/phyksz8081/
Dfsl_phy.c60 result = PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK); in PHY_Init()
70 result = PHY_Write(base, phyAddr, PHY_CONTROL2_REG, (data | PHY_CTL2_REFCLK_SELECT_MASK)); in PHY_Init()
78 result = PHY_Write(base, phyAddr, PHY_AUTONEG_ADVERTISE_REG, in PHY_Init()
84 …PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, (PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUTONEG_M… in PHY_Init()
117 status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data) in PHY_Write() function
202 return PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, data); in PHY_EnableLoopback()
210 … return PHY_Write(base, phyAddr, PHY_CONTROL2_REG, (data | PHY_CTL2_REMOTELOOP_MASK)); in PHY_EnableLoopback()
224 … return PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, (data | PHY_BCTL_RESTART_AUTONEG_MASK)); in PHY_EnableLoopback()
233 … return PHY_Write(base, phyAddr, PHY_CONTROL2_REG, (data & ~PHY_CTL2_REMOTELOOP_MASK)); in PHY_EnableLoopback()
Dfsl_phy.h137 status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data);
/hal_nxp-latest/mcux/mcux-sdk/components/phylan8720a/
Dfsl_phy.c62 (void)PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK); in PHY_Init()
74 (void)PHY_Write(base, phyAddr, PHY_AUTONEG_ADVERTISE_REG, (PHY_ALL_CAPABLE_MASK | 0x1U)); in PHY_Init()
77 …(void)PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, (PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUT… in PHY_Init()
104 status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data) in PHY_Write() function
Dfsl_phy.h116 status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data);
/hal_nxp-latest/mcux/mcux-sdk/cmsis_drivers/enet/
Dfsl_enet_phy_cmsis.c49 result = PHY_Write(&phyHandle, PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK); in PHY_SetForcedSpeedDuplexMode()
66 result = PHY_Write(&phyHandle, PHY_BASICCONTROL_REG, bsctlReg); in PHY_SetForcedSpeedDuplexMode()
81 (void)PHY_Write(&phyHandle, PHY_BASICCONTROL_REG, data); in PHY_SetPowerDown()
87 (void)PHY_Write(&phyHandle, PHY_BASICCONTROL_REG, data); in PHY_SetPowerDown()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyrtl8201/
Dfsl_phyrtl8201.c344 result = PHY_Write(handle, PHY_PAGE_SELECT_REG, PHY_PAGE_INTR_ADDR); in PHY_RTL8201_EnableLinkInterrupt()
373 result = PHY_Write(handle, PHY_PAGE_SELECT_REG, 0); in PHY_RTL8201_EnableLinkInterrupt()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyrtl8211f/
Dfsl_phyrtl8211f.c473 result = PHY_Write(handle, PHY_PAGE_SELECT_REG, PHY_PAGE_INTR_ADDR); in PHY_RTL8211F_EnableLinkInterrupt()
502 result = PHY_Write(handle, PHY_PAGE_SELECT_REG, 0); in PHY_RTL8211F_EnableLinkInterrupt()
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/Driver/Include/
DDriver_ETH_MAC.h303 …int32_t (*PHY_Write) (uint8_t phy_addr, uint8_t reg_addr, uint16_t data); … member
/hal_nxp-latest/mcux/mcux-sdk/components/phy/
Dfsl_phy.h215 static inline status_t PHY_Write(phy_handle_t *handle, uint8_t phyReg, uint16_t data) in PHY_Write() function