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Searched refs:PHY_SPECIALCTL_100SPEED_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phylan8720a/
Dfsl_phylan8720a.c27 #define PHY_SPECIALCTL_100SPEED_MASK 0x0008U /*!< The PHY speed mask. */ macro
217 if ((regValue & PHY_SPECIALCTL_100SPEED_MASK) != 0U) in PHY_LAN8720A_GetLinkSpeedDuplex()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phylan8741/
Dfsl_phylan8741.c28 #define PHY_SPECIALCTL_100SPEED_MASK 0x0008U /*!< The PHY speed mask. */ macro
231 if ((regValue & PHY_SPECIALCTL_100SPEED_MASK) != 0U) in PHY_LAN8741_GetLinkSpeedDuplex()
/hal_nxp-latest/mcux/mcux-sdk/components/phylan8720a/
Dfsl_phy.h46 #define PHY_SPECIALCTL_100SPEED_MASK 0x0008U /*!< The PHY speed mask. */ macro
Dfsl_phy.c230 if ((reg & PHY_SPECIALCTL_100SPEED_MASK) != 0U) in PHY_GetLinkSpeedDuplex()