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Searched refs:PHY_CONTROL_REG (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phylan8720a/
Dfsl_phylan8720a.c15 #define PHY_CONTROL_REG 0x11U /*!< The PHY control/status register. */ macro
302 result = PHY_LAN8720A_READ(handle, PHY_CONTROL_REG, &regValue); in PHY_LAN8720A_EnableLoopback()
305 … result = PHY_LAN8720A_WRITE(handle, PHY_CONTROL_REG, regValue | PHY_CTL_FARLOOPBACK_MASK); in PHY_LAN8720A_EnableLoopback()
323 result = PHY_LAN8720A_READ(handle, PHY_CONTROL_REG, &regValue); in PHY_LAN8720A_EnableLoopback()
326 … result = PHY_LAN8720A_WRITE(handle, PHY_CONTROL_REG, regValue & ~PHY_CTL_FARLOOPBACK_MASK); in PHY_LAN8720A_EnableLoopback()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phylan8741/
Dfsl_phylan8741.c14 #define PHY_CONTROL_REG 0x11U /*!< The PHY control/status register. */ macro
316 result = PHY_LAN8741_READ(handle, PHY_CONTROL_REG, &regValue); in PHY_LAN8741_EnableLoopback()
319 … result = PHY_LAN8741_WRITE(handle, PHY_CONTROL_REG, regValue | PHY_CTL_FARLOOPBACK_MASK); in PHY_LAN8741_EnableLoopback()
337 result = PHY_LAN8741_READ(handle, PHY_CONTROL_REG, &regValue); in PHY_LAN8741_EnableLoopback()
340 … result = PHY_LAN8741_WRITE(handle, PHY_CONTROL_REG, regValue & ~PHY_CTL_FARLOOPBACK_MASK); in PHY_LAN8741_EnableLoopback()