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Searched refs:PHY_BCTL_LOOP_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyksz8081/
Dfsl_phyksz8081.c304 regValue = PHY_BCTL_SPEED0_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_KSZ8081_EnableLoopback()
308 regValue = PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_KSZ8081_EnableLoopback()
317 regValue = PHY_BCTL_SPEED0_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_KSZ8081_EnableLoopback()
340 regValue &= ~PHY_BCTL_LOOP_MASK; in PHY_KSZ8081_EnableLoopback()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyvsc8541/
Dfsl_phyvsc8541.c310 regValue = PHY_BCTL_SPEED1_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_VSC8541_EnableLoopback()
314 regValue = PHY_BCTL_SPEED0_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_VSC8541_EnableLoopback()
318 regValue = PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_VSC8541_EnableLoopback()
328 regValue &= ~PHY_BCTL_LOOP_MASK; in PHY_VSC8541_EnableLoopback()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyrtl8201/
Dfsl_phyrtl8201.c312 regValue = PHY_BCTL_SPEED1_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_RTL8201_EnableLoopback()
316 regValue = PHY_BCTL_SPEED0_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_RTL8201_EnableLoopback()
320 regValue = PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_RTL8201_EnableLoopback()
330 regValue &= ~PHY_BCTL_LOOP_MASK; in PHY_RTL8201_EnableLoopback()
/hal_nxp-latest/mcux/mcux-sdk/components/phyksz8081/
Dfsl_phy.c196 data = PHY_BCTL_SPEED_100M_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_EnableLoopback()
200 data = PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_EnableLoopback()
223 data &= ~PHY_BCTL_LOOP_MASK; in PHY_EnableLoopback()
Dfsl_phy.h41 #define PHY_BCTL_LOOP_MASK 0x4000U /*!< The PHY loop bit mask. */ macro
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phydp83848/
Dfsl_phydp83848.c262 regValue = PHY_BCTL_SPEED0_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_DP83848_EnableLoopback()
266 regValue = PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_DP83848_EnableLoopback()
276 regValue &= ~PHY_BCTL_LOOP_MASK; in PHY_DP83848_EnableLoopback()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyksz8041/
Dfsl_phyksz8041.c275 regValue = PHY_BCTL_SPEED0_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_KSZ8041_EnableLoopback()
279 regValue = PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_KSZ8041_EnableLoopback()
302 regValue &= ~PHY_BCTL_LOOP_MASK; in PHY_KSZ8041_EnableLoopback()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phylan8720a/
Dfsl_phylan8720a.c292 regValue = PHY_BCTL_SPEED0_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_LAN8720A_EnableLoopback()
296 regValue = PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_LAN8720A_EnableLoopback()
317 regValue &= ~PHY_BCTL_LOOP_MASK; in PHY_LAN8720A_EnableLoopback()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyrtl8211f/
Dfsl_phyrtl8211f.c441 regValue = PHY_BCTL_SPEED1_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_RTL8211F_EnableLoopback()
445 regValue = PHY_BCTL_SPEED0_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_RTL8211F_EnableLoopback()
449 regValue = PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_RTL8211F_EnableLoopback()
459 regValue &= ~PHY_BCTL_LOOP_MASK; in PHY_RTL8211F_EnableLoopback()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyar8031/
Dfsl_phyar8031.c415 regValue = PHY_BCTL_SPEED1_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_AR8031_EnableLoopback()
419 regValue = PHY_BCTL_SPEED0_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_AR8031_EnableLoopback()
423 regValue = PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_AR8031_EnableLoopback()
473 regValue &= ~PHY_BCTL_LOOP_MASK; in PHY_AR8031_EnableLoopback()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phylan8741/
Dfsl_phylan8741.c306 regValue = PHY_BCTL_SPEED0_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_LAN8741_EnableLoopback()
310 regValue = PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in PHY_LAN8741_EnableLoopback()
331 regValue &= ~PHY_BCTL_LOOP_MASK; in PHY_LAN8741_EnableLoopback()
/hal_nxp-latest/mcux/mcux-sdk/components/phylan8720a/
Dfsl_phy.h40 #define PHY_BCTL_LOOP_MASK 0x4000U /*!< The PHY loop bit mask. */ macro
/hal_nxp-latest/mcux/mcux-sdk/components/phy/
Dfsl_phy.h42 #define PHY_BCTL_LOOP_MASK ((uint16_t)0x4000U) /*!< The PHY loop bit mask. */ macro