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Searched refs:PHY_BCTL_AUTONEG_MASK (Results 1 – 15 of 15) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyar8031/
Dfsl_phyar8031.c237 … regValue | PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUTONEG_MASK); in PHY_AR8031_Init()
374 regValue &= ~PHY_BCTL_AUTONEG_MASK; in PHY_AR8031_SetLinkSpeedDuplex()
495 regValue = PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESET_MASK; in PHY_AR8031_EnableLoopback()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phydp83848/
Dfsl_phydp83848.c90 (PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUTONEG_MASK)); in PHY_DP83848_Init()
226 regValue &= ~PHY_BCTL_AUTONEG_MASK; in PHY_DP83848_SetLinkSpeedDuplex()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyksz8041/
Dfsl_phyksz8041.c98 PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUTONEG_MASK); in PHY_KSZ8041_Init()
237 regValue &= ~PHY_BCTL_AUTONEG_MASK; in PHY_KSZ8041_SetLinkSpeedDuplex()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phylan8720a/
Dfsl_phylan8720a.c120 (PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUTONEG_MASK)); in PHY_LAN8720A_Init()
254 regValue &= ~PHY_BCTL_AUTONEG_MASK; in PHY_LAN8720A_SetLinkSpeedDuplex()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phylan8741/
Dfsl_phylan8741.c134 (PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUTONEG_MASK)); in PHY_LAN8741_Init()
268 regValue &= ~PHY_BCTL_AUTONEG_MASK; in PHY_LAN8741_SetLinkSpeedDuplex()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyksz8081/
Dfsl_phyksz8081.c122 (PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUTONEG_MASK)); in PHY_KSZ8081_Init()
266 regValue &= ~PHY_BCTL_AUTONEG_MASK; in PHY_KSZ8081_SetLinkSpeedDuplex()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyvsc8541/
Dfsl_phyvsc8541.c132 … (regValue | PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUTONEG_MASK)); in PHY_VSC8541_Init()
268 regValue &= ~PHY_BCTL_AUTONEG_MASK; in PHY_VSC8541_SetLinkSpeedDuplex()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyrtl8201/
Dfsl_phyrtl8201.c142 … (regValue | PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUTONEG_MASK)); in PHY_RTL8201_Init()
277 regValue &= ~PHY_BCTL_AUTONEG_MASK; in PHY_RTL8201_SetLinkSpeedDuplex()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyrtl8211f/
Dfsl_phyrtl8211f.c256 … (regValue | PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUTONEG_MASK)); in PHY_RTL8211F_Init()
399 regValue &= ~PHY_BCTL_AUTONEG_MASK; in PHY_RTL8211F_SetLinkSpeedDuplex()
/hal_nxp-latest/mcux/mcux-sdk/components/phylan8720a/
Dfsl_phy.h38 #define PHY_BCTL_AUTONEG_MASK 0x1000U /*!< The PHY auto negotiation bit mask. */ macro
Dfsl_phy.c77 …(void)PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, (PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUT… in PHY_Init()
/hal_nxp-latest/mcux/mcux-sdk/components/phyksz8081/
Dfsl_phy.h39 #define PHY_BCTL_AUTONEG_MASK 0x1000U /*!< The PHY auto negotiation bit mask. */ macro
Dfsl_phy.c84 …PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, (PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUTONEG_M… in PHY_Init()
/hal_nxp-latest/mcux/mcux-sdk/cmsis_drivers/enet/
Dfsl_enet_phy_cmsis.c57 bsctlReg &= ~(PHY_BCTL_DUPLEX_MASK | PHY_BCTL_SPEED0_MASK | PHY_BCTL_AUTONEG_MASK); in PHY_SetForcedSpeedDuplexMode()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/
Dfsl_phy.h40 #define PHY_BCTL_AUTONEG_MASK ((uint16_t)0x1000U) /*!< The PHY auto negotiation bit mask. */ macro