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Searched refs:PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h60199 #define PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK (0x30U) macro
60207 …(((uint32_t)(x)) << PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_SHIFT)) & PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK)
DMIMXRT1175_cm7.h59297 #define PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK (0x30U) macro
59305 …(((uint32_t)(x)) << PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_SHIFT)) & PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h58773 #define PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK (0x30U) macro
58781 …(((uint32_t)(x)) << PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_SHIFT)) & PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK)
DMIMXRT1165_cm4.h59675 #define PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK (0x30U) macro
59683 …(((uint32_t)(x)) << PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_SHIFT)) & PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h59297 #define PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK (0x30U) macro
59305 …(((uint32_t)(x)) << PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_SHIFT)) & PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h63583 #define PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK (0x30U) macro
63591 …(((uint32_t)(x)) << PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_SHIFT)) & PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK)
DMIMXRT1166_cm7.h62681 #define PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK (0x30U) macro
62689 …(((uint32_t)(x)) << PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_SHIFT)) & PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h64104 #define PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK (0x30U) macro
64112 …(((uint32_t)(x)) << PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_SHIFT)) & PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK)
DMIMXRT1173_cm7.h63202 #define PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK (0x30U) macro
63210 …(((uint32_t)(x)) << PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_SHIFT)) & PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h63205 #define PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK (0x30U) macro
63213 …(((uint32_t)(x)) << PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_SHIFT)) & PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h73872 #define PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK (0x30U) macro
73880 …(((uint32_t)(x)) << PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_SHIFT)) & PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK)
DMIMXRT1176_cm4.h74774 #define PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK (0x30U) macro
74782 …(((uint32_t)(x)) << PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_SHIFT)) & PGMC_BPC_BPC_MODE_DOMAIN_ASSIGN_MASK)