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Searched refs:PDM_VAD0_CTRL_1_VADEN_MASK (Results 1 – 25 of 68) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/pdm/
Dfsl_pdm.h891 base->VAD0_CTRL_1 |= PDM_VAD0_CTRL_1_VADEN_MASK; in PDM_EnableHwvad()
895 base->VAD0_CTRL_1 &= ~PDM_VAD0_CTRL_1_VADEN_MASK; in PDM_EnableHwvad()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h43081 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
43087 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h43079 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
43085 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h43079 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
43085 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h34575 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
34581 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
DMIMXRT735S_cm33_core1.h34635 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
34641 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
DMIMXRT735S_ezhv.h49818 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
49824 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
DMIMXRT735S_cm33_core0.h49842 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
49848 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h43081 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
43087 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h43081 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
43087 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_cm7.h43079 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
43085 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
DMIMX8MN6_ca53.h43093 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
43099 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h37432 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
37438 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
DMIMXRT758S_hifi1.h37370 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
37376 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
DMIMXRT758S_cm33_core0.h52641 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
52647 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h37370 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
37376 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
DMIMXRT798S_cm33_core1.h37432 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
37438 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
DMIMXRT798S_hifi4.h52556 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
52562 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
DMIMXRT798S_cm33_core0.h52641 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
52647 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h59838 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
59844 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
DMIMXRT1175_cm7.h58936 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
58942 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h58412 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
58418 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
DMIMXRT1165_cm4.h59314 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
59320 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h58936 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
58942 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4.h61576 #define PDM_VAD0_CTRL_1_VADEN_MASK (0x1U) macro
61582 … (((uint32_t)(((uint32_t)(x)) << PDM_VAD0_CTRL_1_VADEN_SHIFT)) & PDM_VAD0_CTRL_1_VADEN_MASK)

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