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Searched refs:PDM_CTRL_1_CH4EN_MASK (Results 1 – 25 of 67) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h42436 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
42442 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h42434 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
42440 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h42434 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
42440 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h33728 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
33731 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
DMIMXRT735S_cm33_core1.h33788 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
33791 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
DMIMXRT735S_ezhv.h48971 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
48974 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
DMIMXRT735S_cm33_core0.h48995 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
48998 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h42436 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
42442 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h42436 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
42442 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_cm7.h42434 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
42440 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
DMIMX8MN6_ca53.h42448 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
42454 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h36585 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
36588 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
DMIMXRT758S_hifi1.h36523 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
36526 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
DMIMXRT758S_cm33_core0.h51794 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
51797 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h36523 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
36526 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
DMIMXRT798S_cm33_core1.h36585 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
36588 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
DMIMXRT798S_hifi4.h51709 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
51712 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
DMIMXRT798S_cm33_core0.h51794 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
51797 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h59220 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
59223 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
DMIMXRT1175_cm7.h58318 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
58321 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h57794 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
57797 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
DMIMXRT1165_cm4.h58696 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
58699 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h58318 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
58321 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4.h60931 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
60937 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h62604 #define PDM_CTRL_1_CH4EN_MASK (0x10U) macro
62607 … (((uint32_t)(((uint32_t)(x)) << PDM_CTRL_1_CH4EN_SHIFT)) & PDM_CTRL_1_CH4EN_MASK)

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