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Searched refs:PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4.h47438 #define PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT (2U) macro
47441 …ROL2_REG_RSVDP_2(x) (((uint32_t)(((uint32_t)(x)) << PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT)) …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM5/
DMIMX8MM5_cm4.h47438 #define PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT (2U) macro
47441 …ROL2_REG_RSVDP_2(x) (((uint32_t)(((uint32_t)(x)) << PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT)) …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM6/
DMIMX8MM6_cm4.h47438 #define PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT (2U) macro
47441 …ROL2_REG_RSVDP_2(x) (((uint32_t)(((uint32_t)(x)) << PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT)) …
DMIMX8MM6_ca53.h46903 #define PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT (2U) macro
46906 …ROL2_REG_RSVDP_2(x) (((uint32_t)(((uint32_t)(x)) << PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT)) …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM1/
DMIMX8MM1_cm4.h47438 #define PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT (2U) macro
47441 …ROL2_REG_RSVDP_2(x) (((uint32_t)(((uint32_t)(x)) << PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT)) …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM2/
DMIMX8MM2_cm4.h47438 #define PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT (2U) macro
47441 …ROL2_REG_RSVDP_2(x) (((uint32_t)(((uint32_t)(x)) << PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT)) …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM4/
DMIMX8MM4_cm4.h47438 #define PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT (2U) macro
47441 …ROL2_REG_RSVDP_2(x) (((uint32_t)(((uint32_t)(x)) << PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT)) …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h73467 #define PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT (2U) macro
73470 …ROL2_REG_RSVDP_2(x) (((uint32_t)(((uint32_t)(x)) << PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT)) …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h73467 #define PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT (2U) macro
73470 …ROL2_REG_RSVDP_2(x) (((uint32_t)(((uint32_t)(x)) << PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT)) …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7.h73467 #define PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT (2U) macro
73470 …ROL2_REG_RSVDP_2(x) (((uint32_t)(((uint32_t)(x)) << PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT)) …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_dsp.h70386 #define PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT (2U) macro
70388 …ROL2_REG_RSVDP_2(x) (((uint32_t)(((uint32_t)(x)) << PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT)) …
DMIMX8ML8_cm7.h73467 #define PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT (2U) macro
73470 …ROL2_REG_RSVDP_2(x) (((uint32_t)(((uint32_t)(x)) << PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT)) …
DMIMX8ML8_ca53.h73500 #define PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT (2U) macro
73503 …ROL2_REG_RSVDP_2(x) (((uint32_t)(((uint32_t)(x)) << PCIE_L1SUB_CONTROL2_REG_RSVDP_2_SHIFT)) …